coreboot/src
Ronald G. Minnich a112e77f2f Exynos5420: tighten up display port delays
Shorten a few delays, and make some delays shorter but let the
loops have a higher termination count (i.e. give it the same
amount of time to warm up, but check more frequently).

BUG=None
TEST=Build and boot many times, graphics is fine
BRANCH=None

Change-Id: Id9fe846ae3a8d792b14d62aea4e98d8aad05be43
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/66156
Commit-Queue: Ronald G. Minnich <rminnich@chromium.org>
Tested-by: Ronald G. Minnich <rminnich@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
2013-08-20 16:48:17 -07:00
..
arch Set armv7 up for cpu_info to work as on x86 (so threads can work) 2013-08-20 16:48:12 -07:00
console Don't try to use CBMEM console in bootblock 2013-06-20 15:51:33 -07:00
cpu Exynos5420: tighten up display port delays 2013-08-20 16:48:17 -07:00
device Add Kconfig options to override Subsytem Vendor and Device ID 2013-08-09 11:18:24 -07:00
drivers rtd2132: implement full configuration 2013-08-14 14:39:12 -07:00
ec chromeec: Add event methods for EC requested throttle 2013-08-01 00:30:25 -07:00
include Add a specific post code for S3 resume failures 2013-08-09 11:18:59 -07:00
lib cbfs: Fix overwalk on file scan 2013-08-19 17:29:35 -07:00
mainboard Falco/Slippy: Patch to fix garbage on screen during graphics initialization in normal mode 2013-08-16 20:41:12 -07:00
northbridge Falco/Slippy: Patch to fix garbage on screen during graphics initialization in normal mode 2013-08-16 20:41:12 -07:00
southbridge lynxpoint: Add configuration option for SATA gen3 DTLE registers. 2013-08-14 17:05:27 -07:00
superio Drop prototype guarding for romcc 2013-05-10 11:55:20 -07:00
vendorcode Rename cpu/x86/car.h to arch/early_variables.h 2013-07-30 13:40:23 -07:00
Kconfig Add a HAVE_ARCH_MEMMOVE option to allow overriding memmove. 2013-07-08 11:30:26 -07:00