coreboot/src
Keith Hui 65c4ea0bfb superio/acpi/pnp_kbc.asl: Allow changing device and PNP IDs
Currently DSDT keyboard and mouse device declarations generated by
this file use IDs derived from the logical device number, in the
form of KBD# and PS2# where # is the LDN. This is far from the norm
for mainboards with only one super I/O chip, where they are named
PS2K and PS2M, which is also the names used by the much more
simplistic ASL code in drivers/pc/pc80. They also use hard coded
PNP IDs.

This patch adds two preprocessor symbols, SUPERIO_KBC_PS2KID and
SUPERIO_KBC_PS2MID, to allow these device IDs to be changed, most
likely to PS2K and PS2M. If not defined, existing naming logic is
kept.

Their _HIDs are also changed to refer to EISA ID from Kconfig,
like pc80 does. This in theory allows mainboard to change
their PNP IDs if needed. Only Lenovo laptops actually change this
from the Kconfig default, which is also the formerly hardcoded value.

Goal is to allow eliminating pc80 in favour of this when appropriate,
to avoid potential conflicts that may arise from having duplicate PS/2
devices defined.

TEST=With new symbols undefined, generated dsdt.asl did not change.
Generated dsdt.asl checked for correctness manually via temporary
manual edits, with all combinations of preprocessor controls.

Change-Id: I0dcc94c2cb09fee2e22776fd800c3435a9409c84
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90576
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2026-02-19 19:19:30 +00:00
..
acpi acpi/dsdt_top.asl: Move RBUF out of the _CRS method 2026-02-09 15:20:48 +00:00
arch treewide: Move check-ramstage-overlap variables 2026-02-11 20:00:57 +00:00
commonlib commonlib/list: Change to circular list 2026-02-13 15:17:00 +00:00
console console: Fix flushing for slow consoles 2025-10-02 22:44:46 +00:00
cpu cpu/intel/model_206xx: Load microcode in pre_mp_init() 2026-02-11 10:02:35 +00:00
device device/smbus: Add i2c_eeprom_read 2026-02-03 22:16:02 +00:00
drivers drivers/intel/dtbt: Add discrete Thunderbolt driver 2026-02-17 14:23:40 +00:00
ec ec/google/chromeec: Implement host command to read lid state 2026-02-03 18:19:20 +00:00
include lib/spd_bin: Add support for DDR5 SPD parsing 2026-02-17 20:46:41 +00:00
lib lib/spd_bin: Add support for DDR5 SPD parsing 2026-02-17 20:46:41 +00:00
mainboard mb/starlabs: disable TCO INTRUDER# SMI by default 2026-02-19 19:18:37 +00:00
northbridge nb/intel/sandybridge: Advertise all MCH BARs 2026-02-02 13:57:17 +00:00
sbom sbom: Fix build with merged bootblock and romstage 2025-07-07 14:29:29 +00:00
security soc/intel/common: Add opt-in runtime control for BIOS SMM write 2026-01-29 14:41:46 +00:00
soc intel/smm: make TCO INTRUDER# SMI optional 2026-02-19 19:18:31 +00:00
southbridge sb/intel/bd82x6x/early_usb: Add mainboard hook for USB devices 2026-02-17 20:47:24 +00:00
superio superio/acpi/pnp_kbc.asl: Allow changing device and PNP IDs 2026-02-19 19:19:30 +00:00
vendorcode vc/google/chromeos: Implement splash text for low-battery/off-mode boot 2026-02-13 11:27:56 +00:00
Kconfig arch/x86: Add support for socketed CPUs 2026-02-11 13:22:49 +00:00