011baca89d
In order to give SMM access to more than 4GiB on x86_64, update the page table generation in the SMM loader. Honor CONFIG_CPU_PT_ROM_MAP_GB and map the same amount of the address space as done in other stages. This is required for SMM trying to access the SPI BAR in high MMIO on AMD platforms. TEST=Could access ROM3 BAR at 0xfd00000000 in SMM on AMD/birman+ Change-Id: Iae3dac8d39d3f5e55cc08aa96c8924f6364c5140 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/87573 Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Shuo Liu <shuo.liu@intel.com> |
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| .. | ||
| 64bit | ||
| cache | ||
| lapic | ||
| mtrr | ||
| name | ||
| pae | ||
| smm | ||
| tsc | ||
| backup_default_smm.c | ||
| copy_data_section.inc | ||
| early_reset.S | ||
| entry16.S | ||
| entry32.S | ||
| Kconfig | ||
| Kconfig.debug_cpu | ||
| Makefile.mk | ||
| mp_init.c | ||
| reset16.S | ||
| sipi_vector.S | ||
| smi_trigger.c | ||
| smm_start32_offset.h.template | ||
| topology.c | ||