cpu/x86: Replace LAPIC_DM_* with LAPIC_MT_*
AMD64 spec refers to the field as MT (Message Type), but the IA64 spec refers to it as DM (Delivery Mode). The problem is that there is another field abbreviated as DM (Destination Mode) right next to it. So for better readability, just stick to the AMD64 terminology. Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com> Change-Id: I25cf69d555fe22526f128ff7ed41f82b71f2acf2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/86683 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Andy Ebrahiem <ahmet.ebrahiem@9elements.com> Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com> Reviewed-by: Shuo Liu <shuo.liu@intel.com>
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4 changed files with 16 additions and 15 deletions
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@ -111,7 +111,7 @@ bsp_init:
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/* Send INIT IPI to all excluding ourself. */
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movl LAPIC(ICR), %edi
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movl $(LAPIC_DEST_ALLBUT | LAPIC_INT_ASSERT | LAPIC_DM_INIT), %eax
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movl $(LAPIC_DEST_ALLBUT | LAPIC_INT_ASSERT | LAPIC_MT_INIT), %eax
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1: movl %eax, (%edi)
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movl $0x30, %ecx
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2: pause
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@ -160,7 +160,7 @@ hyper_threading_cpu:
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/* Send Start IPI to all excluding ourself. */
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movl LAPIC(ICR), %edi
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movl $(LAPIC_DEST_ALLBUT | LAPIC_DM_STARTUP), %eax
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movl $(LAPIC_DEST_ALLBUT | LAPIC_MT_STARTUP), %eax
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orl $ap_sipi_vector_in_rom, %eax
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1: movl %eax, (%edi)
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movl $0x30, %ecx
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@ -56,7 +56,7 @@ void stop_this_cpu(void)
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printk(BIOS_DEBUG, "CPU %ld going down...\n", id);
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/* send an LAPIC INIT to myself */
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lapic_send_ipi_self(LAPIC_INT_LEVELTRIG | LAPIC_INT_ASSERT | LAPIC_DM_INIT);
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lapic_send_ipi_self(LAPIC_INT_LEVELTRIG | LAPIC_INT_ASSERT | LAPIC_MT_INIT);
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wait_for_ipi_completion_without_printk(timeout_100ms);
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mdelay(10);
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@ -64,7 +64,7 @@ void stop_this_cpu(void)
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dprintk(BIOS_SPEW, "Deasserting INIT.\n");
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/* Deassert the LAPIC INIT */
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lapic_send_ipi_self(LAPIC_INT_LEVELTRIG | LAPIC_DM_INIT);
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lapic_send_ipi_self(LAPIC_INT_LEVELTRIG | LAPIC_MT_INIT);
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wait_for_ipi_completion_without_printk(timeout_100ms);
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halt();
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@ -434,7 +434,7 @@ static enum cb_err send_sipi_to_aps(int ap_count, atomic_t *num_aps, int sipi_ve
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printk(BIOS_DEBUG, "done.\n");
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}
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lapic_send_ipi_others(LAPIC_INT_ASSERT | LAPIC_DM_STARTUP | sipi_vector);
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lapic_send_ipi_others(LAPIC_INT_ASSERT | LAPIC_MT_STARTUP | sipi_vector);
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printk(BIOS_DEBUG, "Waiting for SIPI to complete...\n");
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if (apic_wait_timeout(10000 /* 10 ms */, 50 /* us */) != CB_SUCCESS) {
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printk(BIOS_ERR, "timed out.\n");
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@ -474,7 +474,7 @@ static enum cb_err start_aps(struct bus *cpu_bus, int ap_count, atomic_t *num_ap
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}
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/* Send INIT IPI to all but self. */
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lapic_send_ipi_others(LAPIC_INT_ASSERT | LAPIC_DM_INIT);
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lapic_send_ipi_others(LAPIC_INT_ASSERT | LAPIC_MT_INIT);
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if (!CONFIG(X86_INIT_NEED_1_SIPI)) {
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printk(BIOS_DEBUG, "Waiting for 10ms after sending INIT.\n");
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@ -658,7 +658,7 @@ void smm_initiate_relocation_parallel(void)
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printk(BIOS_DEBUG, "done.\n");
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}
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lapic_send_ipi_self(LAPIC_INT_ASSERT | LAPIC_DM_SMI);
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lapic_send_ipi_self(LAPIC_INT_ASSERT | LAPIC_MT_SMI);
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if (lapic_busy()) {
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if (apic_wait_timeout(1000 /* 1 ms */, 100 /* us */) != CB_SUCCESS) {
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@ -42,14 +42,15 @@
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#define LAPIC_INT_ASSERT 0x04000
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#define LAPIC_ICR_BUSY 0x01000
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#define LAPIC_DEST_LOGICAL 0x00800
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#define LAPIC_DM_FIXED 0x00000
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#define LAPIC_DM_LOWEST 0x00100
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#define LAPIC_DM_SMI 0x00200
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#define LAPIC_DM_REMRD 0x00300
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#define LAPIC_DM_NMI 0x00400
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#define LAPIC_DM_INIT 0x00500
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#define LAPIC_DM_STARTUP 0x00600
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#define LAPIC_DM_EXTINT 0x00700
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// AMD64 refers to it as MT (Message Type), but IA-64 refers to it as DM (Delivery Mode)
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#define LAPIC_MT_FIXED 0x00000
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#define LAPIC_MT_LOWEST 0x00100
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#define LAPIC_MT_SMI 0x00200
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#define LAPIC_MT_REMRD 0x00300
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#define LAPIC_MT_NMI 0x00400
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#define LAPIC_MT_INIT 0x00500
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#define LAPIC_MT_STARTUP 0x00600
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#define LAPIC_MT_EXTINT 0x00700
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#define LAPIC_VECTOR_MASK 0x000FF
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#define LAPIC_ICR2 0x310
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#define GET_LAPIC_DEST_FIELD(x) (((x)>>24)&0xFF)
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