coreboot/src/northbridge
Patrick Rudolph 4275ff86fa intel raminit: check correct registers in channel_test
Found while doing code review. No actual problem was observed.

Test system:
* Intel IvyBridge
* Gigabyte GA-B75M-D3H

Verify byte-lane error count registers 0 to 7 instead of verifying byte-lane
error count register 0 eight times in a row.

Change-Id: Ife6ac6558b2f65ad947870cde5f15d90560ce6d9
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: http://review.coreboot.org/10664
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-06-28 22:42:11 +02:00
..
amd AMD PI agesawrapper: add PSPP (PCIe Speed Power Policy) interface 2015-06-23 01:10:52 +02:00
dmp/vortex86ex Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
intel intel raminit: check correct registers in channel_test 2015-06-28 22:42:11 +02:00
rdc/r8610 Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
via Remove empty lines at end of file 2015-06-08 00:55:07 +02:00