coreboot/src/soc
Kenji Chen 59b4c94be4 Baytrail: Fixed no_dev_behind_port not executed for RP1/2/3.
BRANCH=master
BUG=chrome-os-partner:33113
TEST=Build a image and test on Rambi.
Signed-off-by: Kenji Chen <kenji.chen@intel.com>

Change-Id: I22c8f9730cc0e1ecc991f2dd7f2a1e7c548a1789
Reviewed-on: https://chromium-review.googlesource.com/226654
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Commit-Queue: Kenji Chen <kenji.chen@intel.com>
Tested-by: Kenji Chen <kenji.chen@intel.com>
2014-11-04 18:14:20 +00:00
..
imgtec urara: UART: CONSOLE_SERIAL selected in Pistachio configuration 2014-10-31 22:32:42 +00:00
intel Baytrail: Fixed no_dev_behind_port not executed for RP1/2/3. 2014-11-04 18:14:20 +00:00
marvell vboot: move vboot files to designated directory 2014-10-22 19:44:12 +00:00
nvidia t132: tegra_lp0_resume: configure debug uart to 115200n8 2014-11-04 01:34:58 +00:00
qualcomm coreboot: Minor board ID changes 2014-10-25 00:00:13 +00:00
rockchip vboot: move vboot files to designated directory 2014-10-22 19:44:12 +00:00
samsung gpio: Extend common GPIO header, simplify function names 2014-10-22 04:06:14 +00:00
Kconfig cosmos: add template for soc and board files 2014-10-09 20:44:46 +00:00
Makefile.inc cosmos: add template for soc and board files 2014-10-09 20:44:46 +00:00