coreboot/src/soc/intel
Aaron Durbin 4db75e681a UPSTREAM: soc/intel/apollolake: use SPI flash boot_device_rw() for ealy stages
If the boot device is SPI flash use the common one in the
early stages. While tweaking the config don't auto select
SPI_FLASH as that is handled automatically by the rest of the
build system.

BUG=chrome-os-partner:56151
BRANCH=None
TEST=None

Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/16201
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Martin Roth <martinroth@google.com>

Change-Id: If5e3d06008d5529dd6d7c05d374a81ba172d58fd
Reviewed-on: https://chromium-review.googlesource.com/373363
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-08-21 12:04:58 -07:00
..
apollolake UPSTREAM: soc/intel/apollolake: use SPI flash boot_device_rw() for ealy stages 2016-08-21 12:04:58 -07:00
baytrail UPSTREAM: Kconfig: introduce writable boot device notion 2016-08-19 14:20:21 -07:00
braswell UPSTREAM: Kconfig: introduce writable boot device notion 2016-08-19 14:20:21 -07:00
broadwell UPSTREAM: Kconfig: introduce writable boot device notion 2016-08-19 14:20:21 -07:00
common UPSTREAM: soc/intel/common: Add support for serial console based ACPI debug 2016-08-14 19:50:42 -07:00
fsp_baytrail UPSTREAM: Remove non-ascii & unprintable characters 2016-08-05 11:45:20 -07:00
fsp_broadwell_de UPSTREAM: fsp_Broadwell_DE: Do not set IRQ3 and IRQ4 to level 2016-08-14 19:50:40 -07:00
quark UPSTREAM: intel/quark: Fix assert check 2016-08-16 03:08:21 -07:00
sch UPSTREAM: intel/sch: Merge northbridge and southbridge in src/soc 2016-05-20 17:08:20 -07:00
skylake UPSTREAM: soc/intel/skylake: make SPI support early stages 2016-08-19 14:20:30 -07:00