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UPSTREAM: soc/intel/skylake: make SPI support early stages

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Using malloc() in SPI code is unnecessary as there's only
one SPI device that the SoC support code handles: boot
device. Therefore, use CAR to for the storage to work around
the current limiations of the SPI API which expects one to
return pointers to objects that are writable. Additionally,
include the SPI support code as well as its dependencies in
all the stages.

BUG=chrome-os-partner:56151
BRANCH=None
TEST=None

Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/16196
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Lee Leahy <leroy.p.leahy@intel.com>

Change-Id: I0192ab59f3555deaf6a6878cc31c059c5c2b7d3f
Reviewed-on: https://chromium-review.googlesource.com/373241
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Aaron Durbin 2016-08-11 17:13:40 -05:00 • committed by chrome-bot
commit 15f50d581d
2 changed files with 14 additions and 11 deletions
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3
src/soc/intel/skylake/Makefile.inc
View file

@ -17,6 +17,7 @@ bootblock-y += bootblock/pch.c
bootblock-y += bootblock/report_platform.c
bootblock-y += bootblock/smbus.c
bootblock-y += bootblock/systemagent.c
bootblock-y += flash_controller.c
bootblock-$(CONFIG_UART_DEBUG) += bootblock/uart.c
bootblock-$(CONFIG_UART_DEBUG) += uart_debug.c
bootblock-y += gpio.c
@ -26,6 +27,8 @@ bootblock-y += pcr.c
bootblock-y += pmutil.c
bootblock-y += tsc_freq.c
verstage-y += flash_controller.c
verstage-y += pch.c
verstage-$(CONFIG_UART_DEBUG) += uart_debug.c
romstage-y += flash_controller.c

22
src/soc/intel/skylake/flash_controller.c
View file

@ -13,6 +13,7 @@
*/
/* This file is derived from the flashrom project. */
#include <arch/early_variables.h>
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
@ -341,15 +342,17 @@ int pch_hwseq_read_status(struct spi_flash *flash, u8 *reg)
return 0;
}
static struct spi_slave boot_spi CAR_GLOBAL;
static struct spi_flash boot_flash CAR_GLOBAL;
static struct spi_flash *spi_flash_hwseq_probe(struct spi_slave *spi)
{
struct spi_flash *flash;
flash = malloc(sizeof(*flash));
if (!flash) {
printk(BIOS_WARNING, "SF: Failed to allocate memory\n");
return NULL;
}
flash = car_get_var_ptr(&boot_flash);
/* Ensure writes can take place to the flash. */
spi_init();
flash->spi = spi;
flash->name = "Opaque HW-sequencing";
@ -369,14 +372,11 @@ static struct spi_flash *spi_flash_hwseq_probe(struct spi_slave *spi)
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
{
struct spi_slave *slave = malloc(sizeof(*slave));
if (!slave) {
printk(BIOS_DEBUG, "PCH SPI: Bad allocation\n");
/* This is special hardware. We expect bus 0 and CS line 0 here. */
if ((bus != 0) || (cs != 0))
return NULL;
}
memset(slave, 0, sizeof(*slave));
struct spi_slave *slave = car_get_var_ptr(&boot_spi);
slave->bus = bus;
slave->cs = cs;