UPSTREAM: fsp_Broadwell_DE: Do not set IRQ3 and IRQ4 to level
When booting Linux as a coreboot payload, serial access does not work properly. This is because the setup code erroneously sets IRQ3 and IRQ4 to level. The UART on Broadwell is 8250/16550 compatible, thus ISA and edge-triggered. This change is not necessary on the non-FSP version of Broadwell support. The non-FSP version does not set these IRQ overrides. Fix verified booting Linux 4.6.0-rc2 on Intel Camelback Mountain CRB, using Intel FSP 1.0. BUG=None BRANCH=None TEST=None Signed-off-by: Kevin Paul Herbert <kevin@trippers.org> Reviewed-on: https://review.coreboot.org/16065 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Change-Id: I17b466676e7f4891c3e75ce6208e1580c9eaf742 Reviewed-on: https://chromium-review.googlesource.com/369119 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -567,15 +567,5 @@ unsigned long acpi_madt_irq_overrides(unsigned long current)
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current += acpi_create_madt_irqoverride(irqovr, 0, sci_irq, sci_irq,
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sci_flags);
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irqovr = (void *)current;
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current += acpi_create_madt_irqoverride(irqovr, 0, 3, 3,
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(MP_IRQ_TRIGGER_LEVEL
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|MP_IRQ_POLARITY_LOW));
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irqovr = (void *)current;
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current += acpi_create_madt_irqoverride(irqovr, 0, 4, 4,
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(MP_IRQ_TRIGGER_LEVEL
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|MP_IRQ_POLARITY_LOW));
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return current;
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}
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