coreboot/src
Venkateshwar S 35d4b3f2f4 arch/arm64: Support to load QTEE firmware in x1P42100
This patch adds support to load QTEE firmware in X1P42100. A new
Kconfig 'ARM64_HAS_SECURE_OS_PAYLOAD' has been introduced to support
packing the QTEE firmware as a CBFS payload type. Based on this
configuration, the QTEE firmware is packed either as a stage or payload
type in CBFS.

In X1P42100, the QTEE FW is packed as a CBFS payload type, as its
memory regions are non-contiguous across system IMEM and DDR.

TEST=Create an image.serial.bin and ensure it boots on X1P42100.
Ensure loading of the QTEE firmware in the appropriate regions.

[INFO ]  CBFS: Found 'fallback/secure_os' @0xff1c0 size 0x2ac188
[DEBUG]  read SPI 0xd2f218 0x2ac188: 225876 us, 12405 KB/s, 99.240 Mbps
[INFO ]  VB2:vb2_secdata_kernel_get() VB2_SECDATA_KERNEL_FLAGS not
                supported for secdata_kernel v0, return 0
[INFO ]  VB2:vb2_digest_init() 2802056 bytes, hash algo 2, HW
                acceleration forbidden
[DEBUG]  Loading segment from ROM address 0x9f8040f8
[DEBUG]    code (compression=0)
[DEBUG]    New segment dstaddr 0x1468f000 memsize 0x2000 srcaddr
                0x9f804280 filesize 0x2000
[DEBUG]  Loading Segment: addr: 0x1468f000 memsz: 0x0000000000002000
                filesz: 0x0000000000002000
[DEBUG]  it's not compressed!
[SPEW ]  [ 0x1468f000, 14691000, 0x14691000) <- 9f804280
[DEBUG]  Loading segment from ROM address 0x9f804114
[DEBUG]    data (compression=0)
[DEBUG]    New segment dstaddr 0x14691000 memsize 0x2000 srcaddr
                0x9f806280 filesize 0x2000
[DEBUG]  Loading Segment: addr: 0x14691000 memsz: 0x0000000000002000
                filesz: 0x0000000000002000
[DEBUG]  it's not compressed!
[SPEW ]  [ 0x14691000, 14693000, 0x14693000) <- 9f806280
[DEBUG]  Loading segment from ROM address 0x9f804130
[DEBUG]    code (compression=0)
[DEBUG]    New segment dstaddr 0xd8087000 memsize 0x12b000 srcaddr
                0x9f808280 filesize 0x12b000
[DEBUG]  Loading Segment: addr: 0xd8087000 memsz: 0x000000000012b000
                filesz: 0x000000000012b000
[DEBUG]  it's not compressed!
[SPEW ]  [ 0xd8087000, d81b2000, 0xd81b2000) <- 9f808280
[DEBUG]  Loading segment from ROM address 0x9f80414c
[DEBUG]    data (compression=0)
[DEBUG]    New segment dstaddr 0xd81b2000 memsize 0x14000 srcaddr
                0x9f933280 filesize 0x14000
[DEBUG]  Loading Segment: addr: 0xd81b2000 memsz: 0x0000000000014000
                filesz: 0x0000000000014000
[DEBUG]  it's not compressed!
[SPEW ]  [ 0xd81b2000, d81c6000, 0xd81c6000) <- 9f933280
[DEBUG]  Loading segment from ROM address 0x9f804168
[DEBUG]    data (compression=0)
[DEBUG]    New segment dstaddr 0xd81c6000 memsize 0xb3000 srcaddr
                0x9f947280 filesize 0xb3000
[DEBUG]  Loading Segment: addr: 0xd81c6000 memsz: 0x00000000000b3000
                filesz: 0x00000000000b3000
[DEBUG]  it's not compressed!
[SPEW ]  [ 0xd81c6000, d8279000, 0xd8279000) <- 9f947280
[DEBUG]  Loading segment from ROM address 0x9f804184
[DEBUG]    BSS 0xd8279000 (4096 byte)
[DEBUG]  Loading Segment: addr: 0xd8279000 memsz: 0x0000000000001000
                filesz: 0x0000000000000000
[DEBUG]  it's not compressed!
[SPEW ]  [ 0xd8279000, d8279000, 0xd827a000) <- 9f9fa280
[DEBUG]  Clearing Segment: addr: 0x00000000d8279000 memsz:
                0x0000000000001000
[DEBUG]  Loading segment from ROM address 0x9f8041a0
[DEBUG]    data (compression=0)
[DEBUG]    New segment dstaddr 0xd82e6000 memsize 0x5d000 srcaddr
                0x9f9fa280 filesize 0xe000
[DEBUG]  Loading Segment: addr: 0xd82e6000 memsz: 0x000000000005d000
                filesz: 0x000000000000e000
[DEBUG]  it's not compressed!
[SPEW ]  [ 0xd82e6000, d82f4000, 0xd8343000) <- 9f9fa280
[DEBUG]  Clearing Segment: addr: 0x00000000d82f4000 memsz:
                0x000000000004f000
[DEBUG]  Loading segment from ROM address 0x9f8041bc
[DEBUG]    BSS 0xd8343000 (65536 byte)
[DEBUG]  Loading Segment: addr: 0xd8343000 memsz: 0x0000000000010000
[DEBUG]  Loading Segment: addr: 0xd8279000 memsz: 0x0000000000001000
                filesz: 0x0000000000000000
[DEBUG]  it's not compressed!
[SPEW ]  [ 0xd8279000, d8279000, 0xd827a000) <- 9f9fa280
[DEBUG]  Clearing Segment: addr: 0x00000000d8279000 memsz:
                0x0000000000001000
[DEBUG]  Loading segment from ROM address 0x9f8041a0
[DEBUG]    data (compression=0)
[DEBUG]    New segment dstaddr 0xd82e6000 memsize 0x5d000 srcaddr
                0x9f9fa280 filesize 0xe000
[DEBUG]  Loading Segment: addr: 0xd82e6000 memsz: 0x000000000005d000
                filesz: 0x000000000000e000
[DEBUG]  it's not compressed!
[SPEW ]  [ 0xd82e6000, d82f4000, 0xd8343000) <- 9f9fa280
[DEBUG]  Clearing Segment: addr: 0x00000000d82f4000 memsz:
                0x000000000004f000
[DEBUG]  Loading segment from ROM address 0x9f8041bc
[DEBUG]    BSS 0xd8343000 (65536 byte)
[DEBUG]  Loading Segment: addr: 0xd8343000 memsz: 0x0000000000010000
                filesz: 0x0000000000000000
[DEBUG]  it's not compressed!
[SPEW ]  [ 0xd8343000, d8343000, 0xd8353000) <- 9fa08280
[DEBUG]  Clearing Segment: addr: 0x00000000d8343000 memsz:
                0x0000000000010000
[DEBUG]  Loading segment from ROM address 0x9f8041d8
[DEBUG]    BSS 0xd8353000 (65536 byte)
[DEBUG]  Loading Segment: addr: 0xd8353000 memsz: 0x0000000000010000
                filesz: 0x0000000000000000
[DEBUG]  it's not compressed!
[SPEW ]  [ 0xd8353000, d8353000, 0xd8363000) <- 9fa08280
[DEBUG]  Clearing Segment: addr: 0x00000000d8353000 memsz:
                0x0000000000010000
[DEBUG]  Loading segment from ROM address 0x9f8041f4
[DEBUG]    data (compression=0)
[DEBUG]    New segment dstaddr 0xd836a000 memsize 0x1000 srcaddr
                0x9fa08280 filesize 0x1000
[DEBUG]  Loading Segment: addr: 0xd836a000 memsz: 0x0000000000001000
                filesz: 0x0000000000001000
[DEBUG]  it's not compressed!
[SPEW ]  [ 0xd836a000, d836b000, 0xd836b000) <- 9fa08280
[DEBUG]  Loading segment from ROM address 0x9f804210
[DEBUG]    code (compression=0)
[DEBUG]    New segment dstaddr 0xd836b000 memsize 0x99000 srcaddr
                0x9fa09280 filesize 0x99000
[DEBUG]  Loading Segment: addr: 0xd836b000 memsz: 0x0000000000099000
                filesz: 0x0000000000099000
[DEBUG]  it's not compressed!
[SPEW ]  [ 0xd836b000, d8404000, 0xd8404000) <- 9fa09280
[DEBUG]  Loading segment from ROM address 0x9f80422c
[DEBUG]    data (compression=0)
[DEBUG]    New segment dstaddr 0xd8404000 memsize 0x3000 srcaddr
                0x9faa2280 filesize 0x3000
[DEBUG]  Loading Segment: addr: 0xd8404000 memsz: 0x0000000000003000
                filesz: 0x0000000000003000
[DEBUG]  it's not compressed!
[SPEW ]  [ 0xd8404000, d8407000, 0xd8407000) <- 9faa2280
[DEBUG]  Loading segment from ROM address 0x9f804248
[DEBUG]    data (compression=0)
[DEBUG]    New segment dstaddr 0xd8407000 memsize 0xb000 srcaddr
                0x9faa5280 filesize 0xb000
[DEBUG]  Loading Segment: addr: 0xd8407000 memsz: 0x000000000000b000
                filesz: 0x000000000000b000
[DEBUG]  it's not compressed!
[SPEW ]  [ 0xd8407000, d8412000, 0xd8412000) <- 9faa5280
[DEBUG]  Loading segment from ROM address 0x9f804264
[DEBUG]    Entry Point 0x1468f000
[SPEW ]  Loaded segments

Change-Id: I5498f418ae7ccc4a8ad2ca05698da3e0a3ec5609
Signed-off-by: Venkateshwar S <vens@qualcomm.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/89548
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2025-10-19 19:41:49 +00:00
..
acpi acpi: Move most of HEST ACPI table to common code 2025-09-30 23:52:09 +00:00
arch arch/arm64: Support to load QTEE firmware in x1P42100 2025-10-19 19:41:49 +00:00
commonlib lib: coreboot_tables: Fix grammar of *These information* in comment 2025-09-28 19:13:52 +00:00
console console: Fix flushing for slow consoles 2025-10-02 22:44:46 +00:00
cpu cpu/x86/topology: Add tile and die ID CPU topology fields 2025-10-13 17:09:18 +00:00
device device: Introduce reworked azalia verb table 2025-09-28 18:18:14 +00:00
drivers drivers/intel/touch: Check SoC I2C speed function exists before calling 2025-10-18 21:52:11 +00:00
ec ec/starlabs/merlin: Add disabled option for lid switch 2025-10-11 18:44:36 +00:00
include drivers/soundwire/cs42l43: Support Cirrus Logic CS42L43 codec 2025-10-18 18:31:09 +00:00
lib lib: Generalize BMP_LOGO help text 2025-10-17 06:55:44 +00:00
mainboard mb/emulation/qemu-riscv: Enable ACPI by default 2025-10-19 19:41:05 +00:00
northbridge nb/intel/haswell/acpi: Add missing MMIO window below 4GB 2025-10-17 22:18:59 +00:00
sbom sbom: Fix build with merged bootblock and romstage 2025-07-07 14:29:29 +00:00
security security/vboot/Makefile.mk: Fix building vboot lib with OpenSIL 2025-10-13 10:11:29 +00:00
soc soc/mediatek/mt8189: Add DSI path support and update mutex 2025-10-18 06:30:31 +00:00
southbridge sb/intel/lynxpoint: Enable PCIe Relaxed Order 2025-09-25 16:06:18 +00:00
superio superio/nuvoton: Add NCT5535D 2025-09-26 19:02:06 +00:00
vendorcode vc/intel/fsp/fsp2_0/wildcatlake: Expose Thermal current thresholds and mode 2025-10-14 16:38:39 +00:00
Kconfig Kconfig: Introduce HAVE_CBFS_FILE_OPTION_BACKEND 2025-09-17 04:18:07 +00:00