d0db2f5e93
This patch enhances the armv7 exception handlers in Coreboot and libpayload to show the correct SP and LR registers from the aborted context, and also dump a part of the current stack. Since we cannot access the banked registers of SVC mode from a different exception mode, it changes Coreboot (and its payloads) to run in System mode instead. As both modes can execute all privileged instructions, this should not have any noticeable effect on firmware operation (please correct me if I'm wrong!). BUG=None TEST=Cause a data_abort in Coreboot or depthcharge. Marvel at the beautifully displayed stack dump that helps you debug the abort. Change-Id: I0e04f47619e55308f7da4a3a99c9cae6ae35cc30 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/170045 Reviewed-by: Gabe Black <gabeblack@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> |
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| .. | ||
| assembler.h | ||
| cache.c | ||
| Config.in | ||
| coreboot.c | ||
| dummy_media.c | ||
| exception.c | ||
| exception_asm.S | ||
| head.S | ||
| libpayload.ldscript | ||
| main.c | ||
| Makefile.inc | ||
| memcpy.S | ||
| memset.S | ||
| sysinfo.c | ||
| timer.c | ||
| util.S | ||
| virtual.c | ||