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libpayload: Make the region to scan for the cb tables configurable.

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The address range to scan for the coreboot tables varies from machine to
machine based on the range memory occupies on the SOC being booted and on the
amount of memory installed on the machine. To make libpayload work on
different ARM systems with different needs, this change makes the region to
scan configurable. In the future, we might want to come up with a more
automatic mechanism like on x86, although there's less consistency on ARM as
far as what ranges are even memory in the first place.

BUG=chrome-os-partner:19420
TEST=Built and booted into depthcharge on snow and pit and saw serial output
which implies that the coreboot tables were found and parsed.
BRANCH=None

Change-Id: Ib50efe25a6152171b0fbd0e324dbc5e89c527d6e
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/59242
Reviewed-by: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
This commit is contained in:
Gabe Black 2013-06-19 04:54:38 -07:00 • committed by ChromeBot
commit 5f740e1fdd
4 changed files with 14 additions and 1 deletions
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8
payloads/libpayload/arch/armv7/Config.in
View file

@ -33,4 +33,12 @@ config ARCH_SPECIFIC_OPTIONS # dummy
def_bool y
select LITTLE_ENDIAN
config COREBOOT_INFO_RANGE_BASE
hex "Base of the range to search for the coreboot tables"
config COREBOOT_INFO_RANGE_SIZE
hex "Size of the range to search for the coreboot tables"
default 0x4000000
endif

3
payloads/libpayload/arch/armv7/coreboot.c
View file

@ -284,7 +284,8 @@ static int cb_parse_header(void *addr, int len, struct sysinfo_t *info)
int get_coreboot_info(struct sysinfo_t *info)
{
int ret = cb_parse_header(phys_to_virt(0xbc000000), 0x4000000, info);
int ret = cb_parse_header(phys_to_virt(CONFIG_COREBOOT_INFO_RANGE_BASE),
CONFIG_COREBOOT_INFO_RANGE_SIZE, info);
return (ret == 1) ? 0 : -1;
}

2
payloads/libpayload/configs/config.daisy
View file

@ -19,6 +19,8 @@ CONFIG_ARCH_ARMV7=y
# CONFIG_ARCH_POWERPC is not set
# CONFIG_ARCH_X86 is not set
# CONFIG_MEMMAP_RAM_ONLY is not set
CONFIG_COREBOOT_INFO_RANGE_BASE=0xbc000000
CONFIG_COREBOOT_INFO_RANGE_SIZE=0x04000000
#
# Standard Libraries

2
payloads/libpayload/configs/config.peach_pit
View file

@ -19,6 +19,8 @@ CONFIG_ARCH_ARMV7=y
# CONFIG_ARCH_POWERPC is not set
# CONFIG_ARCH_X86 is not set
# CONFIG_MEMMAP_RAM_ONLY is not set
CONFIG_COREBOOT_INFO_RANGE_BASE=0x9c000000
CONFIG_COREBOOT_INFO_RANGE_SIZE=0x04000000
#
# Standard Libraries