Maximilian Brune 384e6e1c37 soc/amd/cezanne: Remove set_resets_to_cold ... Renoir actually supports warm reset, so we don't need to toggle the PwrGood for all resets. Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com> Change-Id: I45d6b559874d67b886c65f7ad722f96eba415399 Reviewed-on: https://review.coreboot.org/c/coreboot/+/90211 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2025-11-27 17:56:06 +00:00
..
amd	soc/amd/cezanne: Remove set_resets_to_cold	2025-11-27 17:56:06 +00:00
cavium	soc/cavium: Fix non matching types	2024-08-30 07:34:47 +00:00
example/min86
ibm/power9	soc/power9/rom_media.c: find CBFS in PNOR	2025-08-28 20:14:01 +00:00
intel	device/pci_ids: Add DIDs for TGL-H (GT1 and RM590E)	2025-11-26 18:57:46 +00:00
mediatek	soc/mediatek/mt8189: Enable MEDIATEK_WDT_RESET_BY_SW	2025-11-25 16:48:34 +00:00
nvidia	arch/arm: Add a few ARM targets as supported by CLANG	2024-08-23 10:40:01 +00:00
qualcomm	soc/qc/x1p42100: Add APIs to read PON reason from PMIC	2025-11-26 18:56:25 +00:00
rockchip	arch/arm: Add a few ARM targets as supported by CLANG	2024-08-23 10:40:01 +00:00
samsung	samsung/exynos5250: Replace 'unsigned long int' by 'unsigned long'	2025-01-15 08:32:16 +00:00
sifive	tree: Remove unused <assert.h>	2024-11-19 00:40:04 +00:00
ti	soc/ti/am335x: Remove superfluous formats	2024-08-02 14:45:13 +00:00
ucb/riscv	soc/riscv/ucb: Switch to FDT parsing to get memory size	2025-02-26 17:11:09 +00:00
xilinx	soc/xilinx/zynq7000: Initial Xilinx Zynq 7000 SoC bringup	2025-01-23 00:41:01 +00:00