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device/pci_ids: Add DIDs for TGL-H (GT1 and RM590E)

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This commit adds the relevant DIDs to support Tiger Lake H (TGL-H) systems based on the Xeon W-11865MRE (GPU) and RM590E chipset (PCH).

TEST=A platform with Xeon W-11865MRE and RM590E booted
     the relevant information printed in coreboot log.
     [DEBUG]  CPU: ID 806d1, Tigerlake R0, ucode: 00000056
     [DEBUG]  MCH: device id 9a36 (rev 05) is Tigerlake-H-8-1
     [DEBUG]  PCH: device id 4390 (rev 11) is Tigerlake-H RM590E
     [DEBUG]  IGD: device id 9a70 (rev 01) is Tigerlake H GT1 32EU

Change-Id: I2bff2551b9f194e169c0edd080e9c869bcc9c60f
Signed-off-by: Erik van den Bogaert <ebogaert@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90179
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
This commit is contained in:
Erik van den Bogaert 2025-11-24 13:38:19 +01:00 • committed by Matt DeVillier
commit 12e763eece
2 changed files with 4 additions and 0 deletions
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2
src/include/device/pci_ids.h
View file

@ -3029,6 +3029,7 @@
#define PCI_DID_INTEL_TGP_H_ESPI_HM570 0x438B
#define PCI_DID_INTEL_TGP_H_ESPI_QM580 0x438A
#define PCI_DID_INTEL_TGP_H_ESPI_WM590 0x4389
#define PCI_DID_INTEL_TGP_H_ESPI_RM590E 0x4390
#define PCI_DID_INTEL_MCC_ESPI_0 0x4b00
#define PCI_DID_INTEL_MCC_ESPI_1 0x4b04
#define PCI_DID_INTEL_MCC_BASE_ESPI 0x4b03
@ -4434,6 +4435,7 @@
#define PCI_DID_INTEL_TGL_GT0 0x9A7F
#define PCI_DID_INTEL_TGL_GT1_H_32 0x9A60
#define PCI_DID_INTEL_TGL_GT1_H_16 0x9A68
#define PCI_DID_INTEL_TGL_GT1_H_32_1 0x9A70
#define PCI_DID_INTEL_TGL_GT2_ULT 0x9A49
#define PCI_DID_INTEL_TGL_GT3_ULT 0x9A52
#define PCI_DID_INTEL_TGL_GT2_ULX 0x9A40

2
src/soc/intel/tigerlake/bootblock/report_platform.c
View file

@ -86,6 +86,7 @@ static struct {
{ PCI_DID_INTEL_TGP_H_ESPI_HM570, "Tigerlake-H HM570" },
{ PCI_DID_INTEL_TGP_H_ESPI_QM580, "Tigerlake-H QM580" },
{ PCI_DID_INTEL_TGP_H_ESPI_WM590, "Tigerlake-H WM590" },
{ PCI_DID_INTEL_TGP_H_ESPI_RM590E, "Tigerlake-H RM590E" },
};
static struct {
@ -93,6 +94,7 @@ static struct {
const char *name;
} igd_table[] = {
{ PCI_DID_INTEL_TGL_GT0, "Tigerlake U GT0" },
{ PCI_DID_INTEL_TGL_GT1_H_32_1, "Tigerlake H GT1 32EU" },
{ PCI_DID_INTEL_TGL_GT1_H_32, "Tigerlake H GT1 32EU" },
{ PCI_DID_INTEL_TGL_GT1_H_16, "Tigerlake H GT1 16EU" },
{ PCI_DID_INTEL_TGL_GT2_ULT, "Tigerlake U GT2" },