Subrata Banik 34d6bc8784 soc/qualcomm/x1p42100: Set correct Kconfig defaults for peripherals ... Update the default Kconfig values for the `soc/qualcomm/x1p42100` to specify the correct hardware instances/buses used for various peripherals as per datasheet for bluey (dated 04/15). Changes: - Boot SPI flash bus set to 24. - Console UART instance set to 21. - Select FIXED_UART_FOR_CONSOLE Kconfig as UART is not really selectable due to GPIO Function 0 (bit-bang mode) default configuration. Additionally, remove previous used TODO placeholders. BUG=b:404985109 TEST=Successfully built google/bluey with the Qualcomm x1p42100 SoC. Change-Id: Ia053edb731f7e08c98ffa3fe273ddd1c97b651bb Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/87272 Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Kapil Porwal <kapilporwal@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2025-04-26 03:58:57 +00:00
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common	soc/qualcomm/common: Avoid hardcoding SPI bus from QUP range	2025-04-15 03:45:34 +00:00
ipq40xx	arch/arm: Add a few ARM targets as supported by CLANG	2024-08-23 10:40:01 +00:00
ipq806x	arch/arm: Add a few ARM targets as supported by CLANG	2024-08-23 10:40:01 +00:00
qcs405	tree: Remove unused <assert.h>	2024-11-19 00:40:04 +00:00
sc7180	soc/qualcomm: Use runtime check for QUP wrapper 2 init	2025-04-12 17:33:58 +00:00
sc7280	soc/qualcomm: Use runtime check for QUP wrapper 2 init	2025-04-12 17:33:58 +00:00
x1p42100	soc/qualcomm/x1p42100: Set correct Kconfig defaults for peripherals	2025-04-26 03:58:57 +00:00