soc/qualcomm/x1p42100: Set correct Kconfig defaults for peripherals

Update the default Kconfig values for the `soc/qualcomm/x1p42100`
to specify the correct hardware instances/buses used for various
peripherals as per datasheet for bluey (dated 04/15).

Changes:
- Boot SPI flash bus set to 24.
- Console UART instance set to 21.
- Select FIXED_UART_FOR_CONSOLE Kconfig as UART is not really
  selectable due to GPIO Function 0 (bit-bang mode) default
  configuration.

Additionally, remove previous used TODO placeholders.

BUG=b:404985109
TEST=Successfully built google/bluey with the Qualcomm x1p42100 SoC.

Change-Id: Ia053edb731f7e08c98ffa3fe273ddd1c97b651bb
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87272
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/qualcomm/x1p42100/Kconfig

@@ -12,6 +12,7 @@ config SOC_QUALCOMM_X1P42100
 	select CACHE_MRC_SETTINGS
 	select COMMONLIB_STORAGE
 	select COMMONLIB_STORAGE_SD
+	select FIXED_UART_FOR_CONSOLE
 	select GENERIC_GPIO_LIB
 	select GENERIC_UDELAY
 	select HAS_RECOVERY_MRC_CACHE
@@ -37,11 +38,11 @@ config VBOOT
 
 config BOOT_DEVICE_SPI_FLASH_BUS
 	int
-	default 0 # TODO
+	default 24
 
 config UART_FOR_CONSOLE
 	int
-	default 0 # TODO
+	default 21
 	help
 	 Select the QUP instance to be used for UART console output.