soc/qualcomm: Use runtime check for QUP wrapper 2 init

Refactor the initialization logic for the optional QUPv3 wrapper 2.
Add a runtime check of the `QUP_WRAP2_BASE` macro's value within
`qupv3_fw_init`.

This approach simplifies the QUP wrapper 2 initialization, making the
code flow depend directly on whether a valid base address is defined
for the target SoC.

To facilitate this, explicitly define `QUP_WRAP2_BASE` as 0 (acting as
a dummy entry) for SoCs like sc7180 and sc7280 which do not include
this hardware block. The `if (QUP_WRAP2_BASE)` check will correctly
evaluate to false for these platforms, skipping the initialization.
Platforms that do have QUP wrapper 2 should define its non-zero base
address.

TEST=Able to build google/herobine.

Change-Id: I553ee4891abc5dd744b69bcbee1cca2efd993ef3
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87271
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>

src/soc/qualcomm/common/qupv3_config.c

@@ -262,4 +262,6 @@ void qupv3_fw_init(void)
 
 	qup_common_init(QUP_WRAP0_BASE);
 	qup_common_init(QUP_WRAP1_BASE);
+	if (QUP_WRAP2_BASE)
+		qup_common_init(QUP_WRAP2_BASE);
 }

src/soc/qualcomm/sc7180/include/soc/addressmap.h

@@ -34,6 +34,9 @@
 #define QUP_SERIAL11_BASE		0x00A94000
 #define QUP_WRAP1_BASE			0x00AC0000
 
+/* QUPV3_2 - Dummy Entry */
+#define QUP_WRAP2_BASE			0x00000000
+
 /*
  * USB BASE ADDRESSES
  */

src/soc/qualcomm/sc7280/include/soc/addressmap.h

@@ -55,6 +55,9 @@
 #define QUP_WRAP1_BASE			0x00AC0000
 #define QUP_1_GSI_BASE			0x00A04000
 
+/* QUPV3_2 - Dummy Entry */
+#define QUP_WRAP2_BASE			0x00000000
+
 #define EPSSTOP_EPSS_TOP		0x18598000
 #define EPSSFAST_BASE_ADDR		0x18580000