Vadim Bendebury 2c08977aaa danube: use SOC specific rom stage code ... Romstage initialization code does not need to be board specific, keep it in the SOC directory. Should there be a need for the board specific code, it can be added later. BUG=chrome-os-partner:31438 TEST=with upcoming patches, the urara board coreboot builds fine Change-Id: I27e2d225bd36c42ccd29128d0ea9a970566c02af Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/215992 Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2014-09-03 04:47:39 +00:00
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arch	mips: no need in architecture specific implementation of do_printk	2014-09-02 23:34:47 +00:00
console	console: Allow bootblock console on MIPS	2014-09-01 11:06:29 +00:00
cpu	imgtec/danube: Add support for ImgTec Danube SoC	2014-09-01 11:06:39 +00:00
device	i2c: Add software_i2c driver for I2C debugging and emulation	2014-05-19 20:34:31 +00:00
drivers	Add support for GigaDevice GD25LQ64C/GD25LB64C SPI ROM.	2014-08-28 01:16:15 +00:00
ec	chromeec: Clear post code before reboot to RO	2014-09-02 20:25:38 +00:00
include	arm, arm64, x86: add vprintk to early console	2014-08-30 09:15:26 +00:00
lib	rmodule: Fix rmodule.ld for 64-bit	2014-08-28 01:14:24 +00:00
mainboard	imgvp-danube: Support for the ImgTec Danube Virtual Platform	2014-09-01 11:06:44 +00:00
northbridge	coreboot: Rename coreboot_ram stage to ramstage	2014-05-07 23:30:23 +00:00
soc	danube: use SOC specific rom stage code	2014-09-03 04:47:39 +00:00
southbridge	coreboot: Rename coreboot_ram stage to ramstage	2014-05-07 23:30:23 +00:00
superio	pnp: Allow setting of misc register 0xf4 in device tree	2013-12-20 00:37:38 +00:00
vendorcode	nyans: reduce code duplication in bootblock and romstages	2014-08-30 09:15:32 +00:00
Kconfig	arch/mips: Add base MIPS architecture support	2014-09-01 11:05:57 +00:00