coreboot/src
Aaron Durbin 2762e478c6 arm64: remove assembly code string functions
Inconsistent progress was observed running ramstage.
It was determined that the hand-coded assembly functions
were causing issues. Some of the comments seems suspect about
the hardware taking care of alignment. The prudent thing to do
is to use the C ones. Optimization can come later after maturity.

BUG=chrome-os-partner:29923
BRANCH=None
TEST=Built and booted to attempting to payload

Change-Id: I4137adf9b36b638ed207e4efd57adaac64c6a6c1
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/207431
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
2014-07-11 01:50:01 +00:00
..
arch arm64: remove assembly code string functions 2014-07-11 01:50:01 +00:00
console vboot2: implement select_firmware for pre-romstage verification 2014-06-30 18:45:09 +00:00
cpu x86: Initialize drivers in SMM context if needed 2014-06-20 18:27:33 +00:00
device i2c: Add software_i2c driver for I2C debugging and emulation 2014-05-19 20:34:31 +00:00
drivers Support storm Spansion flash variety 2014-06-23 21:48:49 +00:00
ec vboot2: read dev and recovery switch 2014-07-02 00:45:22 +00:00
include vboot2: copy tlcl from vboot_reference as a preparation for vboot2 integration 2014-07-08 23:29:11 +00:00
lib vboot2: copy tlcl from vboot_reference as a preparation for vboot2 integration 2014-07-08 23:29:11 +00:00
mainboard t132: bring up 64-bit denver core 2014-07-11 01:49:56 +00:00
northbridge coreboot: Rename coreboot_ram stage to ramstage 2014-05-07 23:30:23 +00:00
soc t132: bring up 64-bit denver core 2014-07-11 01:49:56 +00:00
southbridge coreboot: Rename coreboot_ram stage to ramstage 2014-05-07 23:30:23 +00:00
superio pnp: Allow setting of misc register 0xf4 in device tree 2013-12-20 00:37:38 +00:00
vendorcode vboot2: copy tlcl from vboot_reference as a preparation for vboot2 integration 2014-07-08 23:29:11 +00:00
Kconfig coreboot arm64: Add support for arm64 into coreboot framework 2014-05-15 23:52:58 +00:00