coreboot/src
melongmelong 07267d19ce arch/x86/postcar_loader: Add comment line for reloc_params assignment
During finalize_load(), cpu/x86/mtrr/earlymtrr.c:postcar_mtrr is signaled

to be loaded as reloc_params, e.g. with its cache flushed.

Add a comment line to specify the relationship to improve the readability.

I didn't see code to set up parameter at first time.
So, I just guess that adding a comment would be helpful. :)

Change-Id: Ic7d3f9cf514ce5a8efc2af9e78992cb39a91e537
Signed-off-by: NyeonWoo Kim <knw0507@naver.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86866
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
2025-07-07 14:30:58 +00:00
..
acpi drivers/crb/tpm: Add new method to retrieve base address 2025-07-02 16:15:09 +00:00
arch arch/x86/postcar_loader: Add comment line for reloc_params assignment 2025-07-07 14:30:58 +00:00
commonlib drivers/spi: Add 4-byte address mode flag to lb_spi_flash 2025-06-28 02:40:41 +00:00
console console/i2c_smbus: Allow to send data w/o register offset 2024-07-11 00:06:22 +00:00
cpu cpu/intel/haswell: Export PCODE mailbox functions 2025-05-27 15:07:25 +00:00
device device/device_util.c: Complete function documentation 2025-06-15 12:55:59 +00:00
drivers soc/intel: Add Arrow Lake-S/HX IDs 2025-07-03 16:57:15 +00:00
ec mb/google/brox: Enable support for Realtek EC 2025-06-20 17:48:07 +00:00
include soc/intel/pantherlake: Add new MCH ID for Wildcat Lake 2025-07-04 13:17:15 +00:00
lib {lib, drivers/intel}: Add splash screen footer 2025-06-23 02:04:26 +00:00
mainboard mb/google/nissa/var/pujjocento: Reduce PL4 to 38 W with no battery 2025-07-07 14:29:52 +00:00
northbridge Haswell NRI: Implement COMP offset optimisation 2025-07-04 13:17:47 +00:00
sbom sbom: Fix build with merged bootblock and romstage 2025-07-07 14:29:29 +00:00
security security/vboot: Back up CMOS data later boot phase 2025-06-05 13:36:19 +00:00
soc soc/intel/ptl: Add Wildcat Lake CPU ID to platform reporting 2025-07-04 13:17:25 +00:00
southbridge sb/intel/lynxpoint: Add CFR objects for existing options 2025-04-25 14:24:47 +00:00
superio src/superio/nuvoton: Add HWM initialization code 2025-06-11 13:31:25 +00:00
vendorcode vc/intel/fsp2_0/twinlake: Update FSP headers 2025-07-04 13:17:59 +00:00
Kconfig security/vboot: Back up CMOS data later boot phase 2025-06-05 13:36:19 +00:00