Place openSIL timepoints 1, 2 and 3 calls in the driver, which will
serve as the central point for invoking SoC-specific vendorcode
implementations. TP1 and TP2 will initialize silicon pre- and post-PCIe
enumeration, respectively. TP3 then performs late SoC IPs programming
and register locking closer to payload load prior to OS handoff. Add a
Kconfig option for selecting and including the openSIL driver source
code in the build.
Change-Id: If0559fc0ff0ec55e9ef131e5ed20dfb5baa651da
Signed-off-by: Nicolas Kochlowski <nickkochlowski@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85631
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
0341e027cd