Commit graph

11 commits

Author SHA1 Message Date
Carl-Daniel Hailfinger
27b2fb4f07 Every GeodeLX target already has spd_read_byte in
mainboard/$VENDOR/$BOARD/initram.c. It's pointless to have it in the
southbridge code as well.
Kill it in the southbridge code and use mainboard code only.

Thanks to Segher for rediscovering this bug.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@830 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-08-27 22:58:04 +00:00
Carl-Daniel Hailfinger
1b22622323 Change v3 makefile rules to be source-based, part I.
The individual makefiles in lib/ mainboard/ southbridge/ and superio/
have been changed accordingly and the big glue layer in
arch/x86Makefile has been modified to wrap the new rules correctly.

This pepares the way for additional optimizations during compile and
link time.

Build tested and boot tested on Qemu.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@782 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-08-18 11:15:43 +00:00
Carl-Daniel Hailfinger
1a09707fd6 Convert stage2 and initram makefile rules from object to source files.
This creates a clearer distinction between source files in the source 
tree we want to have compiled and indirectly created object/source files 
in the object tree.

It also will make enable us to move to whole-program 
optimization/compilation which should yield substantial size savings.
Then again, we may be able to do that without the makefile conversion as 
well.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@714 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-08-02 20:56:11 +00:00
Carl-Daniel Hailfinger
03dca375db Right now, our Kconfig files in the mainboard/ directory in the v3 tree
are not exactly in the best shape.
- MAINBOARD_NAME is claimed to be the mainboard name, but it is used 
  exclusively as mainboard directory.
- MAINBOARD_NAME is set in mainboard/$VENDOR/$BOARD/Kconfig to
  $VENDOR/$BOARD, but mainboard/$VENDOR/Kconfig already hardcodes
  $VENDOR/$BOARD as board path.
- MAINBOARD_NAME has a help text which will never be displayed to
  the user.

The diffstat is encouraging: A total of 200 lines have been
removed completely.

Per-board Kconfig files have been deleted, the remnants making sense
have been merged into per-vendor Kconfig files and the never-shown help
texts have been removed.

If there are ever some real per-board options and not just tricks to
make the makefiles behave, we can resurrect the per-board Kconfig files.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@705 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-08-01 17:40:22 +00:00
Ronald G. Minnich
2f5d7b66a9 1. fix dtc to properly put @x,y in hex, not decimal.
2. Fix trivial bug in dtc -- ioport is 6 chars long, not 3
3. Fix all dts so that the @ parts are now in hex.
4. fix graphics mem in dbs62 to be 16 MB, per artec.

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@700 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-07-30 15:08:25 +00:00
Ronald G. Minnich
96914e1655 1. geodelx.c: cover case of unterminated DRAM by adding a terminated
parameter to two functions. 
2. geodelx.h: define DRAM_TERMINATED and DRAM_UNTERMINATED constants
3. dbe62/initram.c: move to auto PLL control, so set MANUALCONF to 0
4. all other initram.c: set up calls to cpu_reg_init with proper 
   TERMINATED/UNTERMINATED constants. 

builds for dbe62. The auto PLL strapping is tested and works. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://coreboot.org/repository/coreboot-v3@699 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-07-29 15:54:46 +00:00
Carl-Daniel Hailfinger
b1596f216b Rename mainboard_part_number to mainboard_name in various places. This
is the logical continuation of r416 which happened a year ago.

As an added bonus, we now have consistent naming again, making grepping
the source for dts properties possible.

Build tested on all targets. Patch attached for Gmail users.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@697 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-07-20 21:05:25 +00:00
Carl-Daniel Hailfinger
a4b90bacf4 Makes mainboard-vendor naming more consistent.
mainboard-name naming has been postponed because it's not clear what the
real name should be.

Generated code is identical to the state before the patch.
Compile tested.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@694 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-07-11 12:33:46 +00:00
Carl-Daniel Hailfinger
d9e875537b Move default mainboard vendor/subsystem from Kconfig to dts.
Compile tested including boundary cases.
Runtime tested on dbe62 by Ron. Works fine.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@693 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-07-09 21:21:39 +00:00
Carl-Daniel Hailfinger
4ab20cb518 Move CS5536 IDE configuration into a separate dts and its own PCI device.
Fix dbe62 IDE/NAND selection.

Build-tested on db800, norwich, dbe62, alix.1c, alix.2c3.
No additional breakage for dbe61.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@677 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-05-07 23:21:55 +00:00
Carl-Daniel Hailfinger
15a05ab77a AMD DB800 support, ported from v2.
Tested on real hardware, some weirdness remains, probably related to
IRQ routing.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Marc Jones <marc.jones@amd.com> 


git-svn-id: svn://coreboot.org/repository/coreboot-v3@643 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-03-14 21:15:03 +00:00