- Support for remember our compile time environment
- Simple and always correct version of compute_ip_checksum
- Improve message strings in crt0.base
- Initial support for > 2G ram.
- Sizeram now returns a list of valid ranges of ram
- pci resource allocation now starts at 0xC0000000
- Update sizeram for every northbridge
- Misc cleanups.
- Motherboard identification in the linuxbios table.
- Better SMP startup code.
- Support for the tyan s2462, the supermicro p4dc6, the supermicro p4dc6+, and the beginnings of supermicro p4dpr support
- Remove of no longer needed USE_AMD_NDA option
- Workaround cmos tables overlapping the traditional bios data segment
- Fixes to the p4dc6 examples to be syntactically correct
- Fixes to NLBConfig to fix the previos syntax error ``option foo bar'' is invalid
- Update docmil_fil_inbuf to only be compiled when the appropriate options are set
- Updates NLBConfig.py to export the variables MAINBOARD && TARGET_DIR
as well as correct specify the generated files
and a bunch of generic changes.
- Started playing with automatic scanning memory for LinuxBIOS tables.
- Converted the fill_inbuf drivers to stream drivers. This allows
for pure data copying operations to be faster, and it allows skipping
of unneeded data on platforms that support it.
- Added a section .rodata.streams for the stream driver control structures.
This is preparation for building a bootloader that shares source code
with LinuxBIOS.
- Added a driver command to NLBConfig.py for objects that should
always be linked into LinuxBIOS if they are compiled at all.
- Moved the boot_successful logic down into the guts of the
bootloaders.
- Modified the ip style checksum logic so it isn't specific to uniform
boot headers...
- Added a function ndelay that uses the RTC (this is i786 specific for now).
- Added a function to delay in seconds for the braindead harddrive
spinup logic.
- Added a floppy stream driver.
- Added a ide stream driver.
- Broke out the ram initialization for the p4dc6 into multiple c files.
- Stupidly adapted linuxbiosmain and do_inflate to the new stream
interface. get_byte is now a slow function call so it might be able
to use some optimization.
- Updated the ELF bootloader to the new stream interface and adding a
ELF header scanning function so we can boot off of harddrives and
not smash their partition tables.
- Removed some bogus unlook ahead code from inflate.c
- Fixed a problem where we did not enable I/O resources on VGA
compatible chips. This caused a trident card to lock up the system
when it's memory mapped resources were enabled.
- Correctly set up nested pci busses. Before this a pci bus behind a
pci bus would not get enabled.
- Config changes to the p4dc6
- Added more interrupt sources to the p4dc6 interrupt table
- Converted all of the inbuf drivers to stream drivers.
All have good conversions except the doc_millenium.
- Code to initialize sdram from C on the l440gx
- cache as ram code fro the p6 it works except conflict misses occur
with addresses that are not cached so writing to ram does not work.
Which makes it to brittle to count on.
- Initial implementation of a fallback booting scheme where we can
have two copies of linuxbios in rom at once.
- Movement of 32 bit entry code from entry16.inc to entry32.inc
- Update of all config files so they now also include entry32.inc
- Fix for start_stop.c & entry16.inc so I can fairly arbitrarily relocate
the 16bit entry code in SMP.
- A small number of fixes for warnings
- VIA 686 cleanups from the A7M code (it now works in a different pci slot).
- Update of assembly printing routines to use the debug levels:
TTYS0_TX_CHAR now becomes CONSOLE_<LEVEL>_TX_CHAR.
It's more verbose but now the controls are the same as with the C code.
- Break off of loglevel.h from printk.h. loglevel.h is safe for both
the assembly routines and the C code to include.
- Next round of commits for the supermicro p4dc6
- SMP setup updates (Rons board is broken)
I now allow the other SMP processors to report their existence.
I really need to add a minimum time to run but that hasn't happened yet.
- SMP per motherboard table of apicids, as the assumption that they
would always be 0 & 1 with only two cpus fails.
- RDRAM setup updates. The code isn't done but it now works on more
than one board at a time.
- More cacheram work. Minor bug fixes and some macros to use it from C.
- Entry point changes so we no longer have to jump over our gdt.
- Added/Audited the cpufixup for the i786
- IDE intialization for the 82801 ich2 chip.
This also includes a bunch of my pending work including
- Updated serial code so we can compile in different serial port speeds
- Updates to the build system so that:
- Makefile.settings holds all of the settings of the config variables
- ldoptions and cpuflags are generated automatically with perl scripts
- src/config/Config holds all of the architecture neutral make file settings
- Initial work on the P4 including how to use cache as ram
- Update to the ioapic code for the P4 because it delivers irqs on the system
bus instead of an out of band bus
- Updated version of printf that doesn't need an intermediate buffer
- logbuf_subr now handles the case when we want to use a log buffer
- video_subr handles the preliminary code for writing to a video device.
- Pending changes for the L440GX are merged in as well (hopefully I haven't
messed then up since they were written).
boot.c -- Modified to compile even with -fPIC
generic_sdram.inc -- split out generic_sdram_enable.inc -- Some chipsets
don't need that enable logic.
Added serial_fill_inbuf.c
Removed unused 440gx/param.h sis/630/param.h
Modified: make.base crt0.base ldscript.base mainboard/Config and NLBConfig.py
In NLBConfig.py added the directive mainboardinit (a variant of raminit.inc)
This allows us to remove hardcodes in crt0.S updated every mainboard/Config to
reflect the current state of the hardcodes, and the split of generic_sdram.inc
In crt0.S we should have the bare minimum code in assembly needed to get to C code.
mkrom is no longer needed.
