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tegra124: add a #define for DMA alignment size

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BUG=none
BRANCH=none
TEST=used in SPI driver

Change-Id: I2b348660f38fb181c5a4dcf23091c9740af8b042
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/173638
Reviewed-by: Ronald Minnich <rminnich@chromium.org>
Tested-by: Ronald Minnich <rminnich@chromium.org>
Commit-Queue: David James <davidjames@chromium.org>
This commit is contained in:
David Hendricks 2013-10-17 19:09:31 -07:00 • committed by chrome-internal-fetch
commit f9dc2a8d80
1 changed files with 6 additions and 0 deletions
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6
src/soc/nvidia/tegra124/dma.h
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@ -22,6 +22,12 @@
#include <inttypes.h>
#include <soc/addressmap.h>
/*
* The DMA engine operates on 4 bytes at a time, so make sure any data
* passed via DMA is aligned to avoid underrun/overrun.
*/
#define TEGRA_DMA_ALIGN_BYTES 4
struct apb_dma_channel_regs {
u32 csr; /* 0x00 */
u32 sta; /* 0x04 */