soc/intel/cannonlake: Change the maximum C state to C8

The EDS says that Cannon Lake "supports C0, C2, C3, C6, C8,
and C10 package states". Update the highest state for non-S0ix
boards accordingly.

Change-Id: Ia73e5119041616d4b2e0916b3f0d537c30f8568a
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86200
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/intel/cannonlake/acpi.c

@@ -103,7 +103,7 @@ static const acpi_cstate_t cstate_map[NUM_C_STATES] = {
 static int cstate_set_non_s0ix[] = {
 	C_STATE_C1E,
 	C_STATE_C6_LONG_LAT,
-	C_STATE_C7S_LONG_LAT
+	C_STATE_C8
 };
 
 static int cstate_set_s0ix[] = {