Code changes from my work and the AMD760MP chipset.

The primary changes is the way in which printk works.
But there are many other assorted code cleanups.
Just look and see :)
This commit is contained in:
Eric W. Biederman 2001-08-08 02:45:10 +00:00
commit ed8c9d7e0d
62 changed files with 1362 additions and 977 deletions

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@ -1,25 +1,25 @@
#ifndef _INTEL_CPUID_H_
#define _INTEL_CPUID_H_
#ifndef CPU_P5_CPUID_H
#define CPU_P5_CPUID_H
#ifdef i586
int intel_mtrr_check(void);
#endif
void intel_display_cpuid(void);
int mtrr_check(void);
void display_cpuid(void);
/*
* Generic CPUID function. copied from Linux kernel headers
*/
extern inline void intel_cpuid(int op, int *eax, int *ebx, int *ecx, int *edx)
static inline void cpuid(int op, int *eax, int *ebx, int *ecx, int *edx)
{
__asm__("cpuid"
__asm__("pushl %%ebx\n\t"
"cpuid\n\t"
"movl %%ebx, %%esi\n\t"
"popl %%ebx\n\t"
: "=a" (*eax),
"=b" (*ebx),
"=S" (*ebx),
"=c" (*ecx),
"=d" (*edx)
: "a" (op)
: "cc");
}
#endif /* _INTEL_CPUID_H_ */
#endif /* CPU_P5_CPUID_H */

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@ -15,4 +15,6 @@
#define BBL_CR_BUSY 0x11B
#define BBL_CR_CTL3 0x11E
extern int p6_configure_l2_cache(void);
#endif /* __LINUXBIOS_P6_L2_CACHE_H */

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@ -1,3 +1,6 @@
#ifndef CPU_P6_MSR_H
#define CPU_P6_MSR_H
/*
* Access to machine-specific registers (available on 586 and better only)
* Note: the rd* operations modify the parameters directly (without using
@ -27,4 +30,4 @@
__asm__ __volatile__("rdpmc" \
: "=a" (low), "=d" (high) \
: "c" (counter))
#endif /* CPU_P6_MSR_H */

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@ -1,5 +1,5 @@
#ifndef __LINUXBIOS_MTRR_H
#define __LINUXBIOS_MTRR_H
#ifndef __LINUXBIOS_CPU_P6_MTRR_H
#define __LINUXBIOS_CPU_P6_MTRR_H
/* These are the region types */
#define MTRR_TYPE_UNCACHABLE 0
@ -30,4 +30,13 @@
#define MTRRfix4K_F0000_MSR 0x26e
#define MTRRfix4K_F8000_MSR 0x26f
#endif /* __LINUXBIOS_MTRR_H */
#if !defined(ASSEMBLY)
#if defined(INTEL_PPRO_MTRR)
void setup_mtrrs(unsigned long ramsizeK);
#endif
#endif /* ASSEMBLY */
#endif /* __LINUXBIOS_CPU_P6_MTRR_H */