mb/google/fatcat: Enable s0ix

BUG=b:392235839
TEST=Build fatcat and boot to OS. Run suspend_stress_test to ensure
s0ix entry and exit working.

Change-Id: I80c65782830a2a22a9e8bb39615717a11183d30f
Signed-off-by: Jamie Ryu <jamie.m.ryu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84923
Reviewed-by: Jayvik Desai <jayvik@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Jamie Ryu 2024-10-29 21:31:13 -07:00 committed by Subrata Banik
commit e6785d037d

View file

@ -34,7 +34,7 @@ chip soc/intel/pantherlake
register "sagv" = "SAGV_ENABLED"
# Enable s0ix
register "s0ix_enable" = "false"
register "s0ix_enable" = "true"
# DPTF enable
register "dptf_enable" = "true"