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mb/asus/p8x7x-series: Drop unused MRC devicetree setting

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Drop MRC setting usb3.hs_port_switch_mask that since commit ee12634872
("nb/sandybridge,sb/bd82x6x: Configure USB from southbridge devicetree")
mirrors xhci_switchable_ports and is no longer used separately.

Change-Id: Ic1937461ab45f74f29521a8692629290bfd3c560
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85821
Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Keith Hui 2024-12-31 21:40:19 -05:00 • committed by Matt DeVillier
commit d46776f741
1 changed files with 0 additions and 7 deletions
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7
src/mainboard/asus/p8x7x-series/devicetree.cb
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@ -7,13 +7,6 @@ chip northbridge/intel/sandybridge
register "max_mem_clock_mhz" = "800"
register "spd_addresses" = "{0x50, 0x51, 0x52, 0x53}"
# 4 bit switch mask. 0=not switchable, 1=switchable
# Means once it's loaded the OS, it can swap ports
# from/to EHCI/xHCI. Z77 has four USB3 ports, so 0xf
register "usb3.hs_port_switch_mask" = "0xf"
# (The other 3 usb3.* settings can be set from nvram options, and so are set
# from runtime code)
device domain 0 on
device ref peg10 on end # PCIEX16_1
device ref igd on end