coreboot rush: Add support for basic romstage

Add basic romstage support for rush. Since, dram init needs to be done before we
can jump to armv8 core, romstage will run on armv4 core as well. Thus,
correcting the compiler selection options.

BUG=None
BRANCH=None
TEST=Compiles successfully for rush. Prints romstage banner and initial printk

Change-Id: Ie3cd290e56a712b07c1503dab199e4e34cec04d2
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/205763
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Tom Warren <twarren@nvidia.com>
Commit-Queue: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Furquan Shaikh 2014-06-26 00:11:29 -07:00 committed by chrome-internal-fetch
commit d20b4e6620
3 changed files with 11 additions and 1 deletions

View file

@ -45,6 +45,7 @@ ifeq ($(CONFIG_ARCH_ROMSTAGE_ARM_V4),y)
romstage-c-ccopts += $(armv4_flags)
romstage-S-ccopts += $(armv4_flags)
romstage-y += cache.c
endif
################################################################################

View file

@ -20,11 +20,19 @@
#include <arch/stages.h>
#include <cbfs.h>
#include <console/console.h>
#include <arch/exception.h>
void main(void)
{
void *entry;
console_init();
exception_init();
printk(BIOS_INFO, "T132: romstage here\n");
while (1);
entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/ramstage");
stage_exit(entry);
}

View file

@ -2,12 +2,13 @@ config SOC_NVIDIA_TEGRA132
bool
default n
select ARCH_BOOTBLOCK_ARM_V4
select ARCH_ROMSTAGE_ARM_V8_64
select ARCH_ROMSTAGE_ARM_V4
select ARCH_RAMSTAGE_ARM_V8_64
select ARM_LPAE
select BOOTBLOCK_CONSOLE
select HAVE_UART_SPECIAL
select HAVE_UART_MEMORY_MAPPED
select EARLY_CONSOLE
select ARM_BOOTBLOCK_CUSTOM
if SOC_NVIDIA_TEGRA132