coreboot t132: Enable loading of romstage from CBFS media

Add proper Kconfig options and initialize cbfs media to enable loading of
romstage

BUG=None
BRANCH=None
TEST=Compiles successfully for rush and cbfs_load_stage returns entry pointer
for romstage

Change-Id: If62edcdc0496d89d30003ffd7b827b77835910fd
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/205762
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Tom Warren <twarren@nvidia.com>
Commit-Queue: Aaron Durbin <adurbin@chromium.org>

src/mainboard/google/rush/Kconfig

@@ -54,4 +54,20 @@ config RUSH_BCT_CFG_EMMC
 
 endchoice
 
+config BOOT_MEDIA_SPI_BUS
+	int "SPI bus with boot media ROM"
+	range 1 6
+	depends on RUSH_BCT_CFG_SPI
+	default 4
+	help
+	  Which SPI bus the boot media is connected to.
+
+config BOOT_MEDIA_SPI_CHIP_SELECT
+	int "Chip select for SPI boot media"
+	range 0 3
+	depends on RUSH_BCT_CFG_SPI
+	default 0
+	help
+	  Which chip select to use for boot media.
+
 endif # BOARD_GOOGLE_RUSH

src/soc/nvidia/tegra132/Kconfig

@@ -52,6 +52,14 @@ config STACK_BOTTOM
 	hex
 	default 0x4001c000
 
+config CBFS_CACHE_ADDRESS
+	hex "memory address to put CBFS cache data"
+	default 0x40006000
+
+config CBFS_CACHE_SIZE
+	hex "size of CBFS cache data"
+	default 0x00016000
+
 choice CONSOLE_SERIAL_TEGRA132_UART_CHOICES
 	prompt "Serial Console UART"
 	default CONSOLE_SERIAL_TEGRA132_UARTA

src/soc/nvidia/tegra132/bootblock.c

@@ -24,12 +24,15 @@
 #include <console/console.h>
 #include <soc/clock.h>
 #include <soc/nvidia/tegra/apbmisc.h>
+#include <arch/stages.h>
 
 #include "pinmux.h"
 #include "power.h"
 
 void main(void)
 {
+	void *entry;
+
 	// enable pinmux clamp inputs
 	clamp_tristate_inputs();
 
@@ -65,5 +68,14 @@ void main(void)
 
 	printk(BIOS_INFO, "T132 bootblock: Mainboard bootblock init done\n");
 
-	while(1);
+	entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/romstage");
+
+	if (entry) {
+		printk(BIOS_INFO, "T132 bootblock: jumping to romstage\n");
+		stage_exit(entry);
+	} else {
+		printk(BIOS_INFO, "T132 bootblock: fallback/romstage not found\n");
+	}
+
+	hlt();
 }

src/soc/nvidia/tegra132/cbfs.c

@@ -20,7 +20,11 @@
 
 #include <cbfs.h>  /* This driver serves as a CBFS media source. */
 
+#include "spi.h"
+
 int init_default_cbfs_media(struct cbfs_media *media)
 {
-        return 0;
+	return initialize_tegra_spi_cbfs_media(media,
+		(void*)CONFIG_CBFS_CACHE_ADDRESS,
+		CONFIG_CBFS_CACHE_SIZE);
 }