diff --git a/src/arch/arm/armv4/Makefile.inc b/src/arch/arm/armv4/Makefile.inc index 38916984d8..7945882aa5 100644 --- a/src/arch/arm/armv4/Makefile.inc +++ b/src/arch/arm/armv4/Makefile.inc @@ -45,6 +45,7 @@ ifeq ($(CONFIG_ARCH_ROMSTAGE_ARM_V4),y) romstage-c-ccopts += $(armv4_flags) romstage-S-ccopts += $(armv4_flags) +romstage-y += cache.c endif ################################################################################ diff --git a/src/mainboard/google/rush/romstage.c b/src/mainboard/google/rush/romstage.c index e2b75f6842..f0de9c0dfb 100644 --- a/src/mainboard/google/rush/romstage.c +++ b/src/mainboard/google/rush/romstage.c @@ -20,11 +20,19 @@ #include #include #include +#include void main(void) { void *entry; + console_init(); + exception_init(); + + printk(BIOS_INFO, "T132: romstage here\n"); + + while (1); + entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/ramstage"); stage_exit(entry); } diff --git a/src/soc/nvidia/tegra132/Kconfig b/src/soc/nvidia/tegra132/Kconfig index 93308244de..168ae63742 100644 --- a/src/soc/nvidia/tegra132/Kconfig +++ b/src/soc/nvidia/tegra132/Kconfig @@ -2,12 +2,13 @@ config SOC_NVIDIA_TEGRA132 bool default n select ARCH_BOOTBLOCK_ARM_V4 - select ARCH_ROMSTAGE_ARM_V8_64 + select ARCH_ROMSTAGE_ARM_V4 select ARCH_RAMSTAGE_ARM_V8_64 select ARM_LPAE select BOOTBLOCK_CONSOLE select HAVE_UART_SPECIAL select HAVE_UART_MEMORY_MAPPED + select EARLY_CONSOLE select ARM_BOOTBLOCK_CUSTOM if SOC_NVIDIA_TEGRA132