exynos5420: Correct the 600MHz PMS value

In UM ver0.02, 600MHz clock PMS values differs from what is programed
currently. Though this also results in 600MHz clock, but it is better to
match what UM says. This patch chnage this as per UM

This is ported from https://gerrit.chromium.org/gerrit/#/c/65106/3
(Note: we already used the correct 600MHz value for KPLL)

Signed-off-by: David Hendricks <dhendrix@chromium.org>
BUG=none
BRANCH=none
TEST=built and booted on Pit

Change-Id: I6786815ab33427a23436e6ee37295f6c37dcd3d5
Reviewed-on: https://gerrit.chromium.org/gerrit/65726
Reviewed-by: Ronald G. Minnich <rminnich@chromium.org>
Tested-by: Ronald G. Minnich <rminnich@chromium.org>
Commit-Queue: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
This commit is contained in:
David Hendricks 2013-08-12 15:06:45 -07:00 committed by ChromeBot
commit ceabf57ca7

View file

@ -81,7 +81,7 @@ void system_clock_init(void)
/* Set KPLL*/
writel(KPLL_CON1_VAL, &clk->kpll_con1);
val = set_pll(0xc8, 0x2, 0x2);
val = set_pll(0x190, 0x4, 0x2);
writel(val, &clk->kpll_con0);
while ((readl(&clk->kpll_con0) & PLL_LOCKED) == 0)
;