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soc/intel/pantherlake: Remove storage-off related code

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Crashlog storage and power management in PTL is changed to a unified
and persistent model,removing the need for manual SRAM power-down
commands after crashlog extraction.

Change-Id: I5bea1c816bbb68a4b2b21cc3be6cf118b4282fe7
Signed-off-by: Sowmya Aralguppe <sowmya.aralguppe@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88512
Reviewed-by: Jamie Ryu <jamie.m.ryu@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Bora Guvendik <bora.guvendik@intel.com>
This commit is contained in:
Sowmya Aralguppe 2025-07-21 15:25:37 +05:30 • committed by Matt DeVillier
commit cd2a969c82
1 changed files with 5 additions and 25 deletions
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30
src/soc/intel/pantherlake/crashlog.c
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@ -438,32 +438,12 @@ void cpu_cl_rearm(void)
void cpu_cl_cleanup(void)
{
/* Perform any SOC specific cleanup after reading the crashlog data from SRAM */
uintptr_t ctrl_sts_intfc_addr = get_control_status_interface();
if (!ctrl_sts_intfc_addr) {
printk(BIOS_ERR, "CPU crashlog control and status interface address not valid\n");
return;
}
/* If storage-off is supported, turn off the PUNIT SRAM
* stroage to save power. This clears crashlog records also.
/*
* Crashlog storage and power management in PTL is changed to a unified
* and persistent model,removing the need for manual SRAM power-down
* commands after crashlog extraction.
*/
if (!cpu_cl_disc_tab.header.fields.storage_off_support) {
printk(BIOS_INFO, "CPU crashlog storage_off not supported\n");
return;
}
cl_punit_control_interface_t punit_ctrl_intfc;
memset(&punit_ctrl_intfc, 0, sizeof(cl_punit_control_interface_t));
punit_ctrl_intfc.fields.set_storage_off = 1;
write32p(ctrl_sts_intfc_addr, punit_ctrl_intfc.data);
if (!wait_and_check(CRASHLOG_PUNIT_STORAGE_OFF_MASK))
printk(BIOS_ERR, "CPU crashlog storage_off not asserted\n");
else
printk(BIOS_DEBUG, "CPU crashlog storage_off asserted\n");
/* Does nothing. */
}
pmc_ipc_discovery_buf_t cl_get_pmc_discovery_buf(void)