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soc/intel/pantherlake: Update GT domain TDC value for PTL_TDC_1 SKU

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Update the GT domain Thermal Design Current (TDC) value for the
PTL_TDC_1 SKU from 15A to 23A to align with the latest hardware
specifications. The previous value was inconsistent with the intended
power map, which could lead to incorrect power delivery settings and
potential system instability. This change ensures compliance with
Document #813289, revision 2.1.

Change-Id: Ib6b4ddc422de62585658b5e8464d598762b947ee
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90136
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Guvendik, Bora <bora.guvendik@intel.com>
This commit is contained in:
Jeremy Compostella 2025-11-20 10:03:37 -08:00 • committed by Matt DeVillier
commit cb1045a8b8
1 changed files with 1 additions and 1 deletions
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2
src/soc/intel/pantherlake/chipset_ptl.cb
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@ -10,7 +10,7 @@ chip soc/intel/pantherlake
}"
register "thermal_design_current[PTL_TDC_1]" = "{
[VR_DOMAIN_IA] = 23 * 8,
[VR_DOMAIN_GT] = 15 * 8
[VR_DOMAIN_GT] = 23 * 8
}"
register "thermal_design_current[PTL_TDC_2]" = "{
[VR_DOMAIN_IA] = 28 * 8,