From cb1045a8b8030ddb8a5f6c388da8a63cd4050be3 Mon Sep 17 00:00:00 2001 From: Jeremy Compostella Date: Thu, 20 Nov 2025 10:03:37 -0800 Subject: [PATCH] soc/intel/pantherlake: Update GT domain TDC value for PTL_TDC_1 SKU Update the GT domain Thermal Design Current (TDC) value for the PTL_TDC_1 SKU from 15A to 23A to align with the latest hardware specifications. The previous value was inconsistent with the intended power map, which could lead to incorrect power delivery settings and potential system instability. This change ensures compliance with Document #813289, revision 2.1. Change-Id: Ib6b4ddc422de62585658b5e8464d598762b947ee Signed-off-by: Jeremy Compostella Reviewed-on: https://review.coreboot.org/c/coreboot/+/90136 Tested-by: build bot (Jenkins) Reviewed-by: Guvendik, Bora --- src/soc/intel/pantherlake/chipset_ptl.cb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/soc/intel/pantherlake/chipset_ptl.cb b/src/soc/intel/pantherlake/chipset_ptl.cb index 72907656ef..e646c5dc4e 100644 --- a/src/soc/intel/pantherlake/chipset_ptl.cb +++ b/src/soc/intel/pantherlake/chipset_ptl.cb @@ -10,7 +10,7 @@ chip soc/intel/pantherlake }" register "thermal_design_current[PTL_TDC_1]" = "{ [VR_DOMAIN_IA] = 23 * 8, - [VR_DOMAIN_GT] = 15 * 8 + [VR_DOMAIN_GT] = 23 * 8 }" register "thermal_design_current[PTL_TDC_2]" = "{ [VR_DOMAIN_IA] = 28 * 8,