soc/mediatek/mt8189: Configure and early initialize eMMC
Some eMMCs need 80+ms for CMD1 to complete. And the payload may need to access eMMC in the very early stage (for example, depthcharge needs it 20ms after started) so we have to start initialization in coreboot. BUG=b:379008996 BRANCH=none TEST=build pass and run "storage init" in depthcharge shell on MTK EVB firmware-shell: storage init * 0: mtk_mmc 1 devices total Signed-off-by: Mengqi Zhang <mengqi.zhang@mediatek.corp-partner.google.com> Change-Id: I82f2a155b810a8b9608d70fe0c015e6054d0be00 Reviewed-on: https://review.coreboot.org/c/coreboot/+/87862 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yidi Lin <yidilin@google.com>
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3 changed files with 43 additions and 0 deletions
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@ -38,6 +38,7 @@ ramstage-y += ../common/emi.c
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ramstage-y += ../common/mcu.c mcupm.c
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ramstage-y += ../common/memory.c
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ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c
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ramstage-$(CONFIG_COMMONLIB_STORAGE_MMC) += ../common/msdc.c msdc.c
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ramstage-y += ../common/mt6315.c mt6315.c
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ramstage-y += ../common/mt6359p.c mt6359p.c
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ramstage-y += ../common/mtcmos.c mtcmos.c
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@ -58,6 +58,7 @@ enum {
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PERICFG_AO_BASE = IO_PHYS + 0x01036000,
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DEVAPC_PERI_PAR_AO_BASE = IO_PHYS + 0x0103C000,
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AUDIO_BASE = IO_PHYS + 0x01050000,
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MSDC0_BASE = IO_PHYS + 0x01230000,
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SSUSB_IPPC_BASE = IO_PHYS + 0x01263E00,
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UFSHCI_BASE = IO_PHYS + 0x012B0000,
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UFS0_AO_CFG_BASE = IO_PHYS + 0x012B8000,
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@ -94,6 +95,7 @@ enum {
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IMP_IIC_WRAP_S_BASE = IO_PHYS + 0x01D74000,
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IOCFG_LT0_BASE = IO_PHYS + 0x01E20000,
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IOCFG_LT1_BASE = IO_PHYS + 0x01E30000,
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MSDC0_TOP_BASE = IO_PHYS + 0x01E70000,
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EFUSEC_BASE = IO_PHYS + 0x01F10000,
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IOCFG_RT_BASE = IO_PHYS + 0x01F20000,
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IMP_IIC_WRAP_EN_BASE = IO_PHYS + 0x01F32000,
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40
src/soc/mediatek/mt8189/msdc.c
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40
src/soc/mediatek/mt8189/msdc.c
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@ -0,0 +1,40 @@
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/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
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/*
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* This file is created based on MT8189 Functional Specification
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* Chapter number: 9.8
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*/
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#include <device/mmio.h>
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#include <gpio.h>
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#include <soc/addressmap.h>
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#include <soc/msdc.h>
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#include <soc/regulator.h>
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static const struct pad_func emmc_pins[] = {
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PAD_FUNC_DOWN(EMMC_CLK, MSDC0_CLK),
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PAD_FUNC_DOWN(EMMC_DSL, MSDC0_DSL),
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PAD_FUNC_UP(EMMC_CMD, MSDC0_CMD),
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PAD_FUNC_UP(EMMC_DAT0, MSDC0_DAT0),
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PAD_FUNC_UP(EMMC_DAT1, MSDC0_DAT1),
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PAD_FUNC_UP(EMMC_DAT2, MSDC0_DAT2),
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PAD_FUNC_UP(EMMC_DAT3, MSDC0_DAT3),
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PAD_FUNC_UP(EMMC_DAT4, MSDC0_DAT4),
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PAD_FUNC_UP(EMMC_DAT5, MSDC0_DAT5),
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PAD_FUNC_UP(EMMC_DAT6, MSDC0_DAT6),
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PAD_FUNC_UP(EMMC_DAT7, MSDC0_DAT7),
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};
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void mtk_msdc_configure_emmc(bool is_early_init)
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{
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size_t i;
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for (i = 0; i < ARRAY_SIZE(emmc_pins); i++) {
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gpio_set_mode(emmc_pins[i].gpio, emmc_pins[i].func);
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gpio_set_pull(emmc_pins[i].gpio, GPIO_PULL_ENABLE, emmc_pins[i].select);
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gpio_set_driving(emmc_pins[i].gpio, GPIO_DRV_6_MA);
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}
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if (is_early_init)
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mtk_emmc_early_init((void *)MSDC0_BASE, (void *)MSDC0_TOP_BASE);
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}
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