mb/starlabs/*: Correct USB Type-C Port Configuration

The macro USB2_PORTS_MID vs USB2_PORTS_TYPE_C essentially enables
or disables the PortResetMessage. This is only relevant to TCSS
ports.

Correct the macros accordingly.

Change-Id: I18a078c7f6fb937293e6159f05587b7e1f881512
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/89513
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Sean Rhodes 2025-10-02 14:50:12 +01:00
commit ac8765c88a
5 changed files with 6 additions and 6 deletions

View file

@ -39,7 +39,7 @@ chip soc/intel/alderlake
device ref gna on end
device ref xhci on
# Front USB 3.0 Type-C
register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)"
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)"
register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)"
# Back Top USB 3.0 Type-A

View file

@ -53,7 +53,7 @@ chip soc/intel/cannonlake
end
device ref xhci on
# Motherboard USB 3.0 Type-C
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)"
register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)"
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)"
# Motherboard USB 3.0 Type-A

View file

@ -49,7 +49,7 @@ chip soc/intel/skylake
end
device ref south_xhci on
# Motherboard USB Type C
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)"
register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)"
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)"
# Motherboard USB 3.0

View file

@ -106,7 +106,7 @@ chip soc/intel/alderlake
device ref gna on end
device ref xhci on
# Motherboard USB TBT Type-C
register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)"
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)"
register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)"
# Motherboard USB 3.0 Type-A

View file

@ -121,11 +121,11 @@ chip soc/intel/alderlake
device ref gna on end
device ref xhci on
# Motherboard USB TBT Type-C #0
register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)"
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)"
register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)"
# Motherboard USB TBT Type-C #1
register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)"
register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)"
register "tcss_ports[1]" = "TCSS_PORT_DEFAULT(OC_SKIP)"
# Motherboard USB 3.0 Type-A