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mb/starlabs/starbook/mtl: Configure eSPI GPIO Mux

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Configure Pin Mix for Cs, Clk, Miso and Mosi to get the eSPI
GPIOs working as they should be.

Change-Id: I798f1e98f611a53e9c87f15e1e0f1679b9933bee
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/89520
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Sean Rhodes 2025-10-10 20:49:13 +01:00
commit ac7bb7694d
1 changed files with 5 additions and 0 deletions
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5
src/mainboard/starlabs/starbook/variants/mtl/ramstage.c
View file

@ -6,4 +6,9 @@
void mainboard_silicon_init_params(FSP_S_CONFIG *supd)
{
supd->TcNotifyIgd = 2; // Auto
/* eSPI GPIOs */
supd->SerialIoSpiCsPinMux[0] = 0x14a48a;
supd->SerialIoSpiClkPinMux[0] = 0x14a48b;
supd->SerialIoSpiMisoPinMux[0] = 0x14a48c;
supd->SerialIoSpiMosiPinMux[0] = 0x14a48d;
}