From ac7bb7694d7ee99206edc2d863d1509bdf290a25 Mon Sep 17 00:00:00 2001 From: Sean Rhodes Date: Fri, 10 Oct 2025 20:49:13 +0100 Subject: [PATCH] mb/starlabs/starbook/mtl: Configure eSPI GPIO Mux Configure Pin Mix for Cs, Clk, Miso and Mosi to get the eSPI GPIOs working as they should be. Change-Id: I798f1e98f611a53e9c87f15e1e0f1679b9933bee Signed-off-by: Sean Rhodes Reviewed-on: https://review.coreboot.org/c/coreboot/+/89520 Reviewed-by: Matt DeVillier Tested-by: build bot (Jenkins) --- src/mainboard/starlabs/starbook/variants/mtl/ramstage.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/src/mainboard/starlabs/starbook/variants/mtl/ramstage.c b/src/mainboard/starlabs/starbook/variants/mtl/ramstage.c index 0d400f3977..e602932bfe 100644 --- a/src/mainboard/starlabs/starbook/variants/mtl/ramstage.c +++ b/src/mainboard/starlabs/starbook/variants/mtl/ramstage.c @@ -6,4 +6,9 @@ void mainboard_silicon_init_params(FSP_S_CONFIG *supd) { supd->TcNotifyIgd = 2; // Auto + /* eSPI GPIOs */ + supd->SerialIoSpiCsPinMux[0] = 0x14a48a; + supd->SerialIoSpiClkPinMux[0] = 0x14a48b; + supd->SerialIoSpiMisoPinMux[0] = 0x14a48c; + supd->SerialIoSpiMosiPinMux[0] = 0x14a48d; }