soc/mediatek/common/dp: Use DP_WRITE2BYTE if possible
This patch prevents wrong mask passing to mtk_dp_mask. TEST=emerge-rauru coreboot, check FW screen Change-Id: If8c801173089761db55992279045d053c60dcd86 Signed-off-by: Yidi Lin <yidilin@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/85918 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
parent
1e56bc4851
commit
89c3bb4b08
2 changed files with 3 additions and 3 deletions
|
|
@ -65,7 +65,7 @@ void dptx_hal_settu_setencoder(struct mtk_dp *mtk_dp)
|
|||
mtk_dp_write_byte(mtk_dp, REG_303C_DP_ENCODER0_P0 + 1,
|
||||
BIT(7), BIT(7));
|
||||
DP_WRITE2BYTE(mtk_dp, REG_3040_DP_ENCODER0_P0, 0x2020);
|
||||
mtk_dp_mask(mtk_dp, REG_3364_DP_ENCODER1_P0, 0x2020, 0xfff);
|
||||
DP_WRITE2BYTE(mtk_dp, REG_3364_DP_ENCODER1_P0, 0x2020);
|
||||
mtk_dp_write_byte(mtk_dp, REG_3300_DP_ENCODER1_P0 + 1,
|
||||
0x2, BIT(1) | BIT(0));
|
||||
mtk_dp_write_byte(mtk_dp, REG_3364_DP_ENCODER1_P0 + 1,
|
||||
|
|
|
|||
|
|
@ -292,12 +292,12 @@ void dptx_hal_settu_sramrd_start(struct mtk_dp *mtk_dp, u16 value)
|
|||
|
||||
void dptx_hal_setsdp_downcnt_init_inhblanking(struct mtk_dp *mtk_dp, u16 value)
|
||||
{
|
||||
mtk_dp_mask(mtk_dp, REG_3364_DP_ENCODER1_P0, value, 0xfff);
|
||||
DP_WRITE2BYTE(mtk_dp, REG_3364_DP_ENCODER1_P0, value);
|
||||
}
|
||||
|
||||
void dptx_hal_setsdp_downcnt_init(struct mtk_dp *mtk_dp, u16 value)
|
||||
{
|
||||
mtk_dp_mask(mtk_dp, REG_3040_DP_ENCODER0_P0, value, 0xfff);
|
||||
DP_WRITE2BYTE(mtk_dp, REG_3040_DP_ENCODER0_P0, value);
|
||||
}
|
||||
|
||||
bool dptx_hal_auxread_bytes(struct mtk_dp *mtk_dp, u8 cmd, u32 dpcd_addr, size_t length,
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue