diff --git a/src/soc/mediatek/common/dp/dptx_hal.c b/src/soc/mediatek/common/dp/dptx_hal.c
index 70d69cb1f5..28a1480e3f 100644
--- a/src/soc/mediatek/common/dp/dptx_hal.c
+++ b/src/soc/mediatek/common/dp/dptx_hal.c
@@ -65,7 +65,7 @@ void dptx_hal_settu_setencoder(struct mtk_dp *mtk_dp)
 	mtk_dp_write_byte(mtk_dp, REG_303C_DP_ENCODER0_P0 + 1,
 			  BIT(7), BIT(7));
 	DP_WRITE2BYTE(mtk_dp, REG_3040_DP_ENCODER0_P0, 0x2020);
-	mtk_dp_mask(mtk_dp, REG_3364_DP_ENCODER1_P0, 0x2020, 0xfff);
+	DP_WRITE2BYTE(mtk_dp, REG_3364_DP_ENCODER1_P0, 0x2020);
 	mtk_dp_write_byte(mtk_dp, REG_3300_DP_ENCODER1_P0 + 1,
 			  0x2, BIT(1) | BIT(0));
 	mtk_dp_write_byte(mtk_dp, REG_3364_DP_ENCODER1_P0 + 1,
diff --git a/src/soc/mediatek/common/dp/dptx_hal_common.c b/src/soc/mediatek/common/dp/dptx_hal_common.c
index 4ef07ac327..3ba95d1731 100644
--- a/src/soc/mediatek/common/dp/dptx_hal_common.c
+++ b/src/soc/mediatek/common/dp/dptx_hal_common.c
@@ -292,12 +292,12 @@ void dptx_hal_settu_sramrd_start(struct mtk_dp *mtk_dp, u16 value)
 
 void dptx_hal_setsdp_downcnt_init_inhblanking(struct mtk_dp *mtk_dp, u16 value)
 {
-	mtk_dp_mask(mtk_dp, REG_3364_DP_ENCODER1_P0, value, 0xfff);
+	DP_WRITE2BYTE(mtk_dp, REG_3364_DP_ENCODER1_P0, value);
 }
 
 void dptx_hal_setsdp_downcnt_init(struct mtk_dp *mtk_dp, u16 value)
 {
-	mtk_dp_mask(mtk_dp, REG_3040_DP_ENCODER0_P0, value, 0xfff);
+	DP_WRITE2BYTE(mtk_dp, REG_3040_DP_ENCODER0_P0, value);
 }
 
 bool dptx_hal_auxread_bytes(struct mtk_dp *mtk_dp, u8 cmd, u32 dpcd_addr, size_t length,