mb/google/trulo/var/pujjolo: Enable fivr settings
Add fivr related setting based on schematics 500E_S3A0_TWL_MB_FVT_20250527.pdf BUG=b:437881361 TEST=Build and boot to OS, check suspend funtion work fine using suspend_stress_test -c 5 command. Change-Id: I6c7f2807cc6a9c7c82e28d26205b33d068792522 Signed-off-by: Luca Lai <luca.lai@lcfc.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/88907 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Eric Lai <ericllai@google.com>
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@ -91,6 +91,10 @@ chip soc/intel/alderlake
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register "pch_hda_sdi_enable[0]" = "true"
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register "pch_hda_sdi_enable[1]" = "true"
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# Configure external V1P05/Vnn/VnnSx Rails for Pujjolo
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register "ext_fivr_settings" = "{
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.configure_ext_fivr = 1,
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}"
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# Intel Common SoC Config
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#+-------------------+---------------------------+
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