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drivers/spi: Support forced 4-byte address mode via 0xB7 command

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Many high-capacity SPI flashes (e.g., >16MB) default to 3-byte
addressing and require a specific command to enter 4-byte address mode.

This commit introduces support for sending the
CMD_FORCE_4BYTE_ADDR_MODE (0xB7) command during flash probing. When
Kconfig option `SPI_FLASH_FORCE_4_BYTE_ADDR_MODE` is enabled, this
ensures the flash chip is immediately switched to 4-byte addressing
after power-on.

This addresses issues with flashes like GigaDevice (GD25LQ128D) and
Winbond (W25Q256JWxx) that mandate this command for proper 4-byte
addressing. The new command definition is in `spi_flash_internal.h`.

BUG=b:417900125
TEST=Able to build google/bluey.

Change-Id: I935a0e1d6214d73c8ea487418adc93f016790432
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88156
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2025-06-21 03:25:17 +00:00
commit 5568bee055
2 changed files with 7 additions and 0 deletions
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5
src/drivers/spi/spi_flash.c
View file

@ -564,6 +564,11 @@ int spi_flash_probe(unsigned int bus, unsigned int cs, struct spi_flash *flash)
CONFIG_ROM_SIZE);
}
if (CONFIG(SPI_FLASH_FORCE_4_BYTE_ADDR_MODE)) {
printk(BIOS_DEBUG, "SF: Force 4-byte addressing mode\n");
spi_flash_cmd(&flash->spi, CMD_FORCE_4BYTE_ADDR_MODE, NULL, 0);
}
if (CONFIG(SPI_FLASH_EXIT_4_BYTE_ADDR_MODE) && SPI_FLASH_EXIT_4BYTE_STAGE) {
printk(BIOS_DEBUG, "SF: Exiting 4-byte addressing mode\n");
spi_flash_cmd(&flash->spi, CMD_EXIT_4BYTE_ADDR_MODE, NULL, 0);

2
src/drivers/spi/spi_flash_internal.h
View file

@ -22,6 +22,8 @@
#define CMD_READ_STATUS 0x05
#define CMD_WRITE_ENABLE 0x06
#define CMD_FORCE_4BYTE_ADDR_MODE 0xb7
#define CMD_BLOCK_ERASE 0xD8
#define CMD_EXIT_4BYTE_ADDR_MODE 0xe9