From 5568bee055388040b8d88b3b6b2a49263c2a2281 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Sat, 21 Jun 2025 03:25:17 +0000 Subject: [PATCH] drivers/spi: Support forced 4-byte address mode via 0xB7 command Many high-capacity SPI flashes (e.g., >16MB) default to 3-byte addressing and require a specific command to enter 4-byte address mode. This commit introduces support for sending the CMD_FORCE_4BYTE_ADDR_MODE (0xB7) command during flash probing. When Kconfig option `SPI_FLASH_FORCE_4_BYTE_ADDR_MODE` is enabled, this ensures the flash chip is immediately switched to 4-byte addressing after power-on. This addresses issues with flashes like GigaDevice (GD25LQ128D) and Winbond (W25Q256JWxx) that mandate this command for proper 4-byte addressing. The new command definition is in `spi_flash_internal.h`. BUG=b:417900125 TEST=Able to build google/bluey. Change-Id: I935a0e1d6214d73c8ea487418adc93f016790432 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/88156 Reviewed-by: Kapil Porwal Tested-by: build bot (Jenkins) --- src/drivers/spi/spi_flash.c | 5 +++++ src/drivers/spi/spi_flash_internal.h | 2 ++ 2 files changed, 7 insertions(+) diff --git a/src/drivers/spi/spi_flash.c b/src/drivers/spi/spi_flash.c index b7a024c4c2..80e937a724 100644 --- a/src/drivers/spi/spi_flash.c +++ b/src/drivers/spi/spi_flash.c @@ -564,6 +564,11 @@ int spi_flash_probe(unsigned int bus, unsigned int cs, struct spi_flash *flash) CONFIG_ROM_SIZE); } + if (CONFIG(SPI_FLASH_FORCE_4_BYTE_ADDR_MODE)) { + printk(BIOS_DEBUG, "SF: Force 4-byte addressing mode\n"); + spi_flash_cmd(&flash->spi, CMD_FORCE_4BYTE_ADDR_MODE, NULL, 0); + } + if (CONFIG(SPI_FLASH_EXIT_4_BYTE_ADDR_MODE) && SPI_FLASH_EXIT_4BYTE_STAGE) { printk(BIOS_DEBUG, "SF: Exiting 4-byte addressing mode\n"); spi_flash_cmd(&flash->spi, CMD_EXIT_4BYTE_ADDR_MODE, NULL, 0); diff --git a/src/drivers/spi/spi_flash_internal.h b/src/drivers/spi/spi_flash_internal.h index a30f58f9a5..163b6181b7 100644 --- a/src/drivers/spi/spi_flash_internal.h +++ b/src/drivers/spi/spi_flash_internal.h @@ -22,6 +22,8 @@ #define CMD_READ_STATUS 0x05 #define CMD_WRITE_ENABLE 0x06 +#define CMD_FORCE_4BYTE_ADDR_MODE 0xb7 + #define CMD_BLOCK_ERASE 0xD8 #define CMD_EXIT_4BYTE_ADDR_MODE 0xe9