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The option table C file is a generated file and lives inside the build

Browse source 
directory. Look for it there.
Introduce the STAGE0_DYNAMIC_SRC makefile variable to handle this and
other generated stage1 code.
Thanks to Ron for spotting this bug.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@935 f3766cd6-281f-0410-b1cd-43a5c92072e9
This commit is contained in:
Carl-Daniel Hailfinger 2008-10-16 17:50:08 +00:00
commit 4c275b0435
3 changed files with 5 additions and 2 deletions
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1
arch/x86/Makefile
View file

@ -147,6 +147,7 @@ STAGE0_SRC := $(patsubst %,$(src)/lib/%,$(STAGE0_LIB_SRC)) \
$(STAGE0_MAINBOARD_SRC) $(STAGE0_CHIPSET_SRC)
STAGE0_OBJ := $(patsubst $(src)/%.c,$(obj)/%.o,$(STAGE0_SRC)) \
$(patsubst $(obj)/%.c,$(obj)/%.o,$(STAGE0_DYNAMIC_SRC)) \
$(patsubst %,$(obj)/arch/x86/%,$(STAGE0_CAR_OBJ))
$(obj)/stage0.o $(obj)/stage0.init $(obj)/stage0-prefixed.o: $(STAGE0_OBJ)

3
mainboard/amd/serengeti/Makefile
View file

@ -22,7 +22,6 @@
STAGE0_MAINBOARD_SRC := $(src)/lib/clog2.c \
$(src)/mainboard/$(MAINBOARDDIR)/stage1.c \
$(src)/mainboard/$(MAINBOARDDIR)/option_table.c \
$(src)/arch/x86/stage1_mtrr.c \
$(src)/arch/x86/amd/model_fxx/dualcore_id.c \
$(src)/arch/x86/amd/model_fxx/stage1.c \
@ -33,6 +32,8 @@ STAGE0_MAINBOARD_SRC := $(src)/lib/clog2.c \
$(src)/southbridge/amd/amd8111/stage1_ctrl.c \
$(src)/southbridge/amd/amd8111/stage1_enable_rom.c \
STAGE0_DYNAMIC_SRC := $(obj)/mainboard/$(MAINBOARDDIR)/option_table.c
INITRAM_SRC= $(src)/mainboard/$(MAINBOARDDIR)/initram.c \
$(src)/northbridge/amd/k8/raminit.c \
$(src)/northbridge/amd/k8/dqs.c \

3
mainboard/gigabyte/m57sli/Makefile
View file

@ -21,7 +21,6 @@
STAGE0_MAINBOARD_SRC := $(src)/lib/clog2.c \
$(src)/mainboard/$(MAINBOARDDIR)/stage1.c \
$(src)/mainboard/$(MAINBOARDDIR)/option_table.c \
$(src)/arch/x86/stage1_mtrr.c \
$(src)/arch/x86/amd/model_fxx/dualcore_id.c \
$(src)/arch/x86/amd/model_fxx/stage1.c \
@ -31,6 +30,8 @@ STAGE0_MAINBOARD_SRC := $(src)/lib/clog2.c \
$(src)/southbridge/nvidia/mcp55/stage1_smbus.c \
$(src)/southbridge/nvidia/mcp55/stage1_enable_rom.c \
STAGE0_DYNAMIC_SRC := $(obj)/mainboard/$(MAINBOARDDIR)/option_table.c
INITRAM_SRC= $(src)/mainboard/$(MAINBOARDDIR)/initram.c \
$(src)/northbridge/amd/k8/raminit.c \
$(src)/northbridge/amd/k8/dqs.c \