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soc/intel/pantherlake: Remove unsupported WCL CPU ID mappings

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Remove WCL_ID_2 through WCL_ID_5 entries from the power mapping table
supports a single SKU configuration.

Ref=:830097_WCL_PDG_SchChk_Rev1p5
BUG=b:None
TEST=Build ocelot and verify that the system boots

Change-Id: I95a8069c9b637c35936e6c0e5de257f7acbd8463
Signed-off-by: Sowmya Aralguppe <sowmya.aralguppe@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91448
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Sowmya Aralguppe 2026-02-27 11:24:15 +05:30 • committed by Matt DeVillier
commit 4943cfe4d0
1 changed files with 0 additions and 4 deletions
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4
src/soc/intel/pantherlake/chip.h
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@ -115,10 +115,6 @@ static const struct soc_intel_pantherlake_power_map {
{ PCI_DID_INTEL_PTL_H_ID_7, PTL_CORE_4, TDP_25W, PTL_SKU_7, PTL_TDC_4 },
{ PCI_DID_INTEL_PTL_H_ID_8, PTL_CORE_3, TDP_25W, PTL_SKU_2, PTL_TDC_3 },
{ PCI_DID_INTEL_WCL_ID_1, WCL_CORE, TDP_15W, WCL_SKU_1, WCL_TDC_1 },
{ PCI_DID_INTEL_WCL_ID_2, WCL_CORE, TDP_15W, WCL_SKU_1, WCL_TDC_1 },
{ PCI_DID_INTEL_WCL_ID_3, WCL_CORE, TDP_15W, WCL_SKU_1, WCL_TDC_1 },
{ PCI_DID_INTEL_WCL_ID_4, WCL_CORE, TDP_15W, WCL_SKU_1, WCL_TDC_1 },
{ PCI_DID_INTEL_WCL_ID_5, WCL_CORE, TDP_15W, WCL_SKU_1, WCL_TDC_1 },
};
/* Types of display ports */