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mb/google/ocelot: Update TPM_TIS_ACPI_INTERRUPT value in Kconfig

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Update TPM related default value for TPM_TIS_ACPI_INTERRUPT based on
schematic_1433518 after mapping GPP_B to GPE0_DW1.

BUG=b:394208231, b:430001789
TEST=Build Ocelot and verify it compiles without any error.

Change-Id: I890c6779a24eaa7804594003466e8660af4becc2
Signed-off-by: P, Usha <usha.p@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88358
Reviewed-by: Krishna P Bhat D <krishna.p.bhat.d@intel.com>
Reviewed-by: Sowmya Aralguppe <sowmya.aralguppe@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
This commit is contained in:
P, Usha 2025-07-08 23:32:38 +05:30 • committed by Nick Vaccaro
commit 48c6f66fa4
1 changed files with 1 additions and 1 deletions
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src/mainboard/google/ocelot/Kconfig
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@ -142,7 +142,7 @@ config MEMORY_SOLDERDOWN
config TPM_TIS_ACPI_INTERRUPT
int
default 17 if BOARD_GOOGLE_OCELOT # GPE0_DW0_17 (GPP_B17)
default 49 if BOARD_GOOGLE_OCELOT # GPE0_DW1_17 (GPP_B17)
config UART_FOR_CONSOLE
int