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nb/intel/broadwell: Rename MCH_PAIR to INTRDIRCTL

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The register at MCHBAR offset 0x5418 is named `INTRDIRCTL` on Haswell,
as well as earlier platforms. Sync the Haswell and Broadwell codebases
by renaming `MCH_PAIR` to `INTRDIRCTL` on Broadwell.

Tested with BUILD_TIMELESS=1, Purism Librem 15 v2 remains identical.

Change-Id: I0b37927ebec634b6e48623f75789723cf518c3ef
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91621
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Alicja Michalska <ahplka19@gmail.com>
This commit is contained in:
Angel Pons 2026-03-09 16:34:43 +01:00 • committed by Matt DeVillier
commit 342d77a0dd
2 changed files with 2 additions and 2 deletions
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2
src/northbridge/intel/broadwell/include/soc/systemagent.h
View file

@ -95,7 +95,7 @@
#define GFXVTBAR 0x5400
#define EDRAMBAR 0x5408
#define VTVC0BAR 0x5410
#define MCH_PAIR 0x5418
#define INTRDIRCTL 0x5418
#define GDXCBAR 0x5420
#define MCH_DDR_POWER_LIMIT_LO 0x58e0

2
src/northbridge/intel/broadwell/northbridge.c
View file

@ -332,7 +332,7 @@ static void systemagent_read_resources(struct device *dev)
static void systemagent_init(struct device *dev)
{
/* Enable Power Aware Interrupt Routing. */
mchbar_clrsetbits8(MCH_PAIR, 0x7, 0x4); /* Clear 2:0, set Fixed Priority */
mchbar_clrsetbits8(INTRDIRCTL, 0x7, 0x4); /* Clear 2:0, set Fixed Priority */
/*
* Set bits 0 + 1 of BIOS_RESET_CPL to indicate to the CPU