diff --git a/src/northbridge/intel/broadwell/include/soc/systemagent.h b/src/northbridge/intel/broadwell/include/soc/systemagent.h
index 0230f5f4e5..afdf1a9f6f 100644
--- a/src/northbridge/intel/broadwell/include/soc/systemagent.h
+++ b/src/northbridge/intel/broadwell/include/soc/systemagent.h
@@ -95,7 +95,7 @@
 #define GFXVTBAR		0x5400
 #define EDRAMBAR		0x5408
 #define VTVC0BAR		0x5410
-#define MCH_PAIR		0x5418
+#define INTRDIRCTL		0x5418
 #define GDXCBAR			0x5420
 
 #define MCH_DDR_POWER_LIMIT_LO	0x58e0
diff --git a/src/northbridge/intel/broadwell/northbridge.c b/src/northbridge/intel/broadwell/northbridge.c
index eec9e325c7..bb45c374a8 100644
--- a/src/northbridge/intel/broadwell/northbridge.c
+++ b/src/northbridge/intel/broadwell/northbridge.c
@@ -332,7 +332,7 @@ static void systemagent_read_resources(struct device *dev)
 static void systemagent_init(struct device *dev)
 {
 	/* Enable Power Aware Interrupt Routing. */
-	mchbar_clrsetbits8(MCH_PAIR, 0x7, 0x4);	/* Clear 2:0, set Fixed Priority */
+	mchbar_clrsetbits8(INTRDIRCTL, 0x7, 0x4);	/* Clear 2:0, set Fixed Priority */
 
 	/*
 	 * Set bits 0 + 1 of BIOS_RESET_CPL to indicate to the CPU