Revert "soc/intel/pantherlake: Enable all RootPorts on PTL-H484"
This reverts commit 261274992d.
Reason for revert: Panther Lake U/H Processor EDS vol 1/2 says PTL-U/H
12Xe has 12 PCIe RPs where else PTL-H 4Xe has 10 PCIe RPs.
This change has limit the capability for devices that is build with
PTL-U/H 12Xe hence, we are seeing below errors
```
[ERROR] pcie_rp_update_devicetree: Error: Group exceeds
CONFIG_MAX_ROOT_PORTS.
```
As a result PCIe Gen 5 devices (SSD) unable to init and enabled during
boot.
Change-Id: I0443554ef8f619c485f16edc576794f9cf2e85ea
Signed-off-by: Pranava Y N <pranavayn@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91075
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
parent
0fd6a83a11
commit
28608c503a
1 changed files with 2 additions and 2 deletions
|
|
@ -253,8 +253,8 @@ config MAX_TBT_ROOT_PORTS
|
|||
config MAX_ROOT_PORTS
|
||||
int
|
||||
default 6 if SOC_INTEL_WILDCATLAKE
|
||||
default 12 if SOC_INTEL_PANTHERLAKE_H
|
||||
default 10
|
||||
default 10 if SOC_INTEL_PANTHERLAKE_H
|
||||
default 12
|
||||
|
||||
config MAX_PCIE_CLOCK_SRC
|
||||
int
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue